Vojin G. Oklobdzija
Affiliations: | Electrical and Computer Engineering | University of California, Davis, Davis, CA |
Area:
Electronics and Electrical EngineeringWebsite:
https://faculty.engineering.ucdavis.edu/oklobzija/biography/Google:
"Vojin. G. Oklobdzija"Bio:
https://books.google.com/books?id=bNciOAAACAAJ
http://acsel-lab.com/Publications/Papers/05-ckt-struct-ICCC-82.pdf
Parents
Sign in to add mentor| Algirdas Avizienis | grad student | 1982 | UCLA (Computer Science Tree) | |
| Milos D. Ercegovac | grad student | 1982 | UCLA (Computer Science Tree) | |
| (Design for Testability of VLSI Structures Through Use of Circuit Techniques) | ||||
Children
Sign in to add trainee| Aamir A. Farooqui | grad student | 2000 | UC Davis |
| Nikola Nedovic | grad student | 2003 | UC Davis |
| Jia-Ji Liu | grad student | 2004 | UC Davis |
| Hoang Q. Dao | grad student | 2006 | UC Davis |
| Bart R. Zeydel | grad student | 2006 | UC Davis |
| Marko Aleksic | grad student | 2007 | UC Davis |
| Christophe P. Giacomotto | grad student | 2009 | UC Davis |
| Milena Vratonjic | grad student | 2010 | UC Davis |
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Publications
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| Zeydel BR, Baran D, Oklobdzija VG. (2010) Energy-Efficient Design Methodologies: High-Performance VLSI Adders Ieee Journal of Solid-State Circuits. 45: 1220-1233 |
| Giacomotto C, Nedovic N, Oklobdzija VG. (2007) The Effect of the System Specification on the Optimal Selection of Clocked Storage Elements Ieee Journal of Solid-State Circuits. 42: 1392-1404 |
| Dao HQ, Zeydel BR, Oklobdzija VG. (2006) Energy optimization of pipelined digital systems using circuit sizing and supply scaling Ieee Transactions On Very Large Scale Integration Systems. 14: 122-134 |
| Oklobdzija VG, Zeydel BR, Dao HQ, et al. (2005) Comparison of high-performance VLSI adders in the energy-delay space Ieee Transactions On Very Large Scale Integration Systems. 13: 754-758 |
| Nedovic N, Oklobdzija VG. (2005) Dual-edge triggered storage elements and clocking strategy for low-power systems Ieee Transactions On Very Large Scale Integration Systems. 13: 577-590 |
| Nedovic N, Walker WW, Oklobdzija VG. (2004) A test circuit for measurement of clocked storage element characteristics Ieee Journal of Solid-State Circuits. 39: 1294-1304 |
| Oklobdzija VG. (2003) Clocking and clocked storage elements in a multi-gigahertz environment Ibm Journal of Research and Development. 47: 567-583 |
| Maksimovic D, Oklobdzija VG, Nikolic B, et al. (2000) Clocked CMOS adiabatic logic with integrated single-phase power-clock supply Ieee Transactions On Very Large Scale Integration Systems. 8: 460-463 |
| Nikolic B, Oklobdzija VG, Stojanovic V, et al. (2000) Improved sense-amplifier-based flip-flop: design and measurements Ieee Journal of Solid-State Circuits. 35: 876-884 |
| Stojanovic V, Oklobdzija VG. (1999) Comparative analysis of master-slave latches and flip-flops for high-performance and low-power systems Ieee Journal of Solid-State Circuits. 34: 536-548 |