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Volkan Kursun, Ph.D.

Affiliations:	2004	Electrical and Computer Engineering	University of Rochester, Rochester, NY
	2004-2008	Electrical and Computer Engineering	University of Wisconsin, Madison, Madison, WI
	2008-	Electronic and Computer Engineering	Hong Kong University of Science and Technology, Clear Water Bay, Kowloon, Hong Kong

Area:

Electronics and Electrical Engineering

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"Volkan Kursun"

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Parents

Eby G. Friedman	grad student	2004	Rochester
(Supply and threshold voltage scaling techniques in CMOS circuits.)

Children

Ranjith Kumar	grad student	2008	UW Madison
Zhiyu Liu	grad student	2008	UW Madison
Sherif A. Tawfik	grad student	2009	UW Madison
Hailong Jiao	grad student	2012	HKUST
Yanan Sun	grad student	2014	Shanghai Jiao Tong University
Hong Zhu	grad student	2014	HKUST

Collaborators

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Publications

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Sun Y, He W, Mao Z, et al. (2020) Monolithic 3D Carbon Nanotube Memory for Enhanced Yield and Integration Density Ieee Transactions On Circuits and Systems. 67: 2431-2441
Gundu AK, Kursun V. (2019) Low Leakage Clock Tree With Dual-Threshold- Voltage Split Input–Output Repeaters Ieee Transactions On Very Large Scale Integration Systems. 27: 1537-1547
Sun Y, He W, Mao Z, et al. (2018) Metallic-CN-Removal-Tolerant High-Yield Six-CN-MOSFET SRAM Cell for Carbon-Based Embedded Memory Ieee Transactions On Electron Devices. 65: 1230-1238
Sun Y, He W, Mao Z, et al. (2017) High-Yield and Robust 9T SRAM Cell Tolerant to Removal of Metallic Carbon Nanotubes Ieee Transactions On Device and Materials Reliability. 17: 20-31
Sun Y, He W, Mao Z, et al. (2017) Variable strength keeper for high-speed and low-leakage carbon nanotube domino logic Microelectronics Journal. 62: 12-20
Salahuddin SM, Kursun V. (2016) Write Assist SRAM Cell with Asymmetrical Bitline Access Transistors for Enhanced Data Stability and Write Ability Journal of Circuits, Systems and Computers. 25
Salahuddin SM, Kursun V. (2016) Asymmetrical FinFET SRAM cells with wider read noise margin and lower leakage currents Ieee Region 10 Annual International Conference, Proceedings/Tencon. 2016
Jiao H, Qiu Y, Kursun V. (2016) Variability-aware 7T SRAM circuit with low leakage high data stability SLEEP mode Integration, the Vlsi Journal. 53: 68-79
Jiao H, Qiu Y, Kursun V. (2016) Low power and robust memory circuits with asymmetrical ground gating Microelectronics Journal. 48: 109-119
Salahuddin SM, Kursun V, Jiao H. (2015) Finfet sram cells with asymmetrical bitline access transistors for enhanced read stability Transactions On Electrical and Electronic Materials. 16: 293-302

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