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Magdy A. El-Moursy, Ph.D.

Affiliations:			Mentor Graphics
	2004	Electrical and Computer Engineering	University of Rochester, Rochester, NY
	2004-2006		Intel Corporation, Santa Clara, CA, United States
	2006-		Electronics Research Institute (ERI) of Egypt

Area:

Electronics and Electrical Engineering

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"Magdy El-Moursy"

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Parents

Eby G. Friedman	grad student	2004	Rochester
(Design methodologies for on-chip inductive interconnect.)

Children

Dina Ellithy	grad student		Polytechnique Montréal
Rabab Ezeldeen Rabeea	grad student	2015	Electronics Research Institute (ERI) of Egypt
Mohamed Gama	grad student	2016	Electronics Research Institute (ERI) of Egypt

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Publications

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Ellaithy DM, El-Moursy MA, Zaki A, et al. (2019) Dual-Channel Multiplier for Piecewise-Polynomial Function Evaluation for Low-Power 3-D Graphics Ieee Transactions On Very Large Scale Integration Systems. 27: 790-798
Ellaithy DM, El-Moursy MA, Ibrahim GH, et al. (2017) Double Logarithmic Arithmetic Technique for Low-Power 3-D Graphics Applications Ieee Transactions On Very Large Scale Integration Systems. 25: 2144-2152
Muhammad ST, El-Moursy MA, El-Moursy AA, et al. (2017) Architecture level analysis for process variation in synchronous and asynchronous Networks-on-Chip Journal of Parallel and Distributed Computing. 102: 175-185
Ezz-Eldin R, El-Moursy MA, Hamed HFA. (2016) Process variation delay and congestion aware routing algorithm for asynchronous NoC design Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 24: 909-919
Ezz-Eldin R, El-Moursy MA, Hamed HFA. (2016) Corrigendum to High throughput asynchronous NoC design under high process variation Integr. VLSI J. 49 (2015) 1-13 Integration. 52: 334
Egila MG, El-Moursy MA, El-Hennawy AE, et al. (2016) FPGA-based electrocardiography (ECG) signal analysis system using least-square linear phase finite impulse response (FIR) filter Journal of Electrical Systems and Information Technology. 3: 513-526
El-Moursy MA, Sheirah A, Safar M, et al. (2015) Efficient embedded SoC hardware/software codesign using virtual platform Proceedings of 2014 9th International Design and Test Symposium, Idt 2014. 36-38
Qoutb AEG, El-Gunidy AM, Tolba MF, et al. (2015) High speed special function unit for graphics processing unit Proceedings of 2014 9th International Design and Test Symposium, Idt 2014. 24-29
Muhammad ST, El-Moursy MA, El-Moursy AA, et al. (2015) Optimization for traffic-based virtual channel activation low-power NoC 5th International Conference On Energy Aware Computing Systems and Applications, Iceac 2015
Ezz-Eldin R, El-Moursy MA, Hamed HFA. (2015) High Throughput Asynchronous NoC Design under High Process Variation Integration, the Vlsi Journal. 49: 1-13

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