Harika Manem, Ph.D.
Affiliations: | 2012 | Electrical and Computer Engineering | Polytechnic Institute of New York University, Brooklyn, NY, NY, United States |
Area:
Electronics and Electrical Engineering, Computer EngineeringGoogle:
"Harika Manem"Parents
Sign in to add mentorGarrett S. Rose | grad student | 2012 | Polytechnic Institute of New York University | |
(Design approaches for nanoscale logic and memory architectures.) |
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Publications
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Uddin M, Majumder MB, Beckmann K, et al. (2018) Design Considerations for Memristive Crossbar Physical Unclonable Functions Acm Journal On Emerging Technologies in Computing Systems. 14: 1-23 |
Beckmann K, Manem H, Cady NC. (2017) Performance Enhancement of a Time-Delay PUF Design by Utilizing Integrated Nanoscale ReRAM Devices Ieee Transactions On Emerging Topics in Computing. 5: 304-316 |
Beckmann K, Holt J, Manem H, et al. (2016) Nanoscale Hafnium Oxide RRAM Devices Exhibit Pulse Dependent Behavior and Multi-level Resistance Capability Mrs Advances. 1: 3355-3360 |
Manem H, Xu M, Carroll R, et al. (2016) Design considerations for three dimensional integrated circuits for aerospace applications Ieee Aerospace Conference Proceedings. 2016 |
Manem H, Beckmann K, Xu M, et al. (2015) An extendable multi-purpose 3D neuromorphic fabric using nanoscale memristors 2015 Ieee Symposium On Computational Intelligence For Security and Defense Applications, Cisda 2015 - Proceedings. 35-42 |
Manem H, Rajendran J, Rose GS. (2012) Design considerations for multilevel CMOS/Nano memristive memory Acm Journal On Emerging Technologies in Computing Systems. 8 |
Manem H, Rajendran J, Rose GS. (2012) Stochastic gradient descent inspired training technique for a CMOS/nano memristive trainable threshold gate array Ieee Transactions On Circuits and Systems I: Regular Papers. 59: 1051-1060 |
Rajendran J, Manem H, Karri R, et al. (2012) An Energy-Efficient Memristive Threshold Logic Circuit Ieee Transactions On Computers. 61: 474-487 |
Rose GS, Rajendran J, Manem H, et al. (2012) Leveraging memristive systems in the construction of digital logic circuits Proceedings of the Ieee. 100: 2033-2049 |
Manem H, Rose GS. (2011) A read-monitored write circuit for 1T1M multi-level memristor memories Proceedings - Ieee International Symposium On Circuits and Systems. 2938-2941 |