Jintae Kim
Affiliations: | 2008 | University of California, Los Angeles, Los Angeles, CA |
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"Jintae Kim"Parents
Sign in to add mentorChih-Kong K. Yang | grad student | 2008 | UCLA | |
(Multi-level design optimizations of pipelined A/D converter.) |
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Publications
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Jin J, Jin X, Jung J, et al. (2018) A 0.75–3.0-Gb/s Dual-Mode Temperature-Tolerant Referenceless CDR With a Deadzone-Compensated Frequency Detector Ieee Journal of Solid-State Circuits. 53: 2994-3003 |
Park H, Kim J. (2018) A 0.8-V Resistor-Based Temperature Sensor in 65-nm CMOS With Supply Sensitivity of 0.28 °C/V Ieee Journal of Solid-State Circuits. 53: 906-912 |
Joo S, Kim J, Kim S. (2017) Power-Supply Rejection Model Analysis of Capacitor-Less LDO Regulator Designs Ieice Transactions On Electronics. 100: 504-512 |
Park Y, Kim J, Kim C. (2016) A Scalable Bandwidth Mismatch Calibration Technique for Time-Interleaved ADCs Ieee Transactions On Circuits and Systems. 63: 1889-1897 |
Jang I, Lee Y, Kim S, et al. (2016) Power-Performance Tradeoff Analysis of CML-Based High-Speed Transmitter Designs Using Circuit-Level Optimization Ieee Transactions On Circuits and Systems I: Regular Papers. 63: 540-550 |
Jin X, Bae JH, Chun JH, et al. (2015) A 1.25 GHz low power multi-phase PLL using phase interpolation between two complementary clocks Journal of Semiconductor Technology and Science. 15: 594-600 |
Joo S, Kim J, Kim S. (2015) Stability and PSR(Power-Supply Rejection) Models for Design Optimization of Capacitor-less LDO Regulators The Journal of Korean Institute of Electromagnetic Engineering and Science. 26: 71-80 |
Lee H, Aurangozeb, Park S, et al. (2015) A 6-bit 2.5-GS/s Time-Interleaved Analog-to-Digital Converter Using Resistor-Array Sharing Digital-to-Analog Converter Ieee Transactions On Very Large Scale Integration Systems. 23: 2371-2383 |
Kim J, Modjtahedi S, Yang CKK. (2015) A Redundancy-Based Calibration Technique for High-Speed Digital-to-Analog Converters Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 2395-2407 |
Kim J, Lee M. (2015) A Semiblind Digital-Domain Calibration of Pipelined A/D Converters via Convex Optimization Ieee Transactions On Very Large Scale Integration Systems. 23: 1375-1379 |