Ivan S. Kourtev
Affiliations: | 1999 | Electrical and Computer Engineering | University of Rochester, Rochester, NY |
1999-2006 | Electrical and Computer Engineering | University of Pittsburgh, Pittsburgh, PA, United States | |
2007- | Google, Inc., Mountain View, CA, United States |
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"Ivan Kourtev"Parents
Sign in to add mentorEby G. Friedman | grad student | 1999 | Rochester | |
(Thesis: Enhanced Algorithms for Non-Zero Clock Skew Scheduling) |
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Publications
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Taskin B, Kourtev I. (2009) Multi-phase rotary clock synchronization of level-sensitive circuits Journal of Circuits, Systems and Computers. 18: 899-908 |
Kourtev IS, Taskin B, Friedman EG. (2009) Timing optimization through clock skew scheduling Timing Optimization Through Clock Skew Scheduling. 1-265 |
Taskin B, Kourtev IS. (2006) Delay insertion method in clock skew scheduling Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 651-663 |
Taskin B, Kourtev IS. (2006) A timing optimization method based on clock skew scheduling and partitioning in a parallel computing environment Midwest Symposium On Circuits and Systems. 2: 486-490 |
Taskin B, Wood J, Kourtev IS. (2006) Timing-driven physical design for VLSI circuits using resonant rotary clocking Midwest Symposium On Circuits and Systems. 1: 261-265 |
Lucas JM, Hoare R, Kourtev IS, et al. (2006) Technology mapping for field programmable gate arrays using Content-Addressable Memory (CAM) Proceedings - 14th Annual Ieee Symposium On Field-Programmable Custom Computing Machines, Fccm 2006. 299-300 |
Kourtev IS, Friedman EG. (2005) Clock Skew Scheduling for Improved Reliability The Electrical Engineering Handbook. 231-262 |
Secareanu RM, Warner S, Seabridge S, et al. (2004) Substrate Coupling in Digital Circuits in Mixed-Signal Smart-Power Systems Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 67-78 |
Taskin B, Kourtev IS. (2004) Linearization of the Timing Analysis and Optimization of Level-Sensitive Digital Synchronous Circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 12-27 |
Taskin B, Kourtev IS. (2004) Advanced timing of level-sensitive sequential circuits 11th Ieee International Conference On Electronics, Circuits and Systems, Icecs 2004. 603-606 |