Junjun Li, Ph.D.
Affiliations: | 2004 | University of Illinois, Urbana-Champaign, Urbana-Champaign, IL |
Area:
Electronics and Electrical EngineeringGoogle:
"Junjun Li"Parents
Sign in to add mentor| Elyse Rosenbaum | grad student | 2004 | UIUC | |
| (Characterization, design, and modeling of on -chip electrostatic discharge protection devices.) | ||||
BETA: Related publications
See more...
Publications
|
You can help our author matching system! If you notice any publications incorrectly attributed to this author, please sign in and mark matches as correct or incorrect. |
| Cilento T, Schenkel M, Yun C, et al. (2010) Simulation of ESD protection devices in an advanced CMOS technology using a TCAD workbench based on an ESD calibration methodology Microelectronics Reliability. 50: 1367-1372 |
| Alvarez D, Chatty KV, Russ C, et al. (2009) Design optimization of gate-silicided ESD NMOSFETs in a 45 nm bulk CMOS technology. Microelectronics Reliability. 49: 1417-1423 |
| Li J, Joshi S, Barnes R, et al. (2006) Compact modeling of on-chip ESD protection devices using Verilog-A Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 1047-1063 |
| Alvarez D, Abou-Khalil MJ, Russ C, et al. (2006) Analysis of ESD failure mechanism in 65nm bulk CMOS ESD NMOSFETs with ESD implant Microelectronics Reliability. 46: 1597-1602 |
| Li J, Li H, Barnes R, et al. (2005) Comprehensive study of drain breakdown in MOSFETs Ieee Transactions On Electron Devices. 52: 1180-1186 |