Hratch Mangassarian, Ph.D.
Affiliations: | 2012 | Electrical and Computer Engineering | University of Toronto, Toronto, ON, Canada |
Area:
Electronics and Electrical EngineeringGoogle:
"Hratch Mangassarian"Parents
Sign in to add mentor| Andreas Veneris | grad student | 2012 | University of Toronto | |
| (Formal Methods in Computer-Aided Design.) | ||||
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Publications
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| Mangassarian H, Le B, Veneris A. (2014) Debugging RTL Using Structural Dominance Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 33: 153-166 |
| Mangassarian H, Veneris A, Najm FN. (2012) Maximum circuit activity estimation using pseudo-Boolean satisfiability Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 31: 271-284 |
| Mangassarian H, Veneris A, Benedetti M. (2010) Robust QBF Encodings for Sequential Circuits with Applications to Verification, Debug, and Test Ieee Transactions On Computers. 59: 981-994 |
| Benedetti M, Mangassarian H. (2008) QBF-Based Formal Verification: Experience and Perspectives Journal On Satisfiability, Boolean Modeling and Computation. 5: 133-191 |