Jeyavijayan Rajendran

Affiliations: 
2015 Electrical and Computer Engineering New York University, New York, NY, United States 
 2015-2017 Electrical and Computer Engineering University of Texas, Dallas, Richardson, TX, United States 
 2017- Electrical and Computer Engineering Texas A & M University, College Station, TX, United States 
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"Jeyavijayan Rajendran"
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Publications

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Zeltmann SE, Gupta N, Tsoutsos NG, et al. (2016) Manufacturing and Security Challenges in 3D Printing Jom. 1-10
Rajendran J, Karri R, Rose GS. (2015) Improving tolerance to variations in memristor-based applications using parallel memristors Ieee Transactions On Computers. 64: 733-746
Rajendran J, Zhang H, Zhang C, et al. (2015) Fault Analysis-Based Logic Encryption Ieee Transactions On Computers. 64: 410-424
Rajendran J, Kanuparthi AK, Karri R, et al. (2013) Securing processors against insider attacks: A circuit-microarchitecture co-design approach Ieee Design and Test. 30: 35-44
Manem H, Rajendran J, Rose GS. (2012) Design considerations for multilevel CMOS/Nano memristive memory Acm Journal On Emerging Technologies in Computing Systems. 8
Manem H, Rajendran J, Rose GS. (2012) Stochastic gradient descent inspired training technique for a CMOS/nano memristive trainable threshold gate array Ieee Transactions On Circuits and Systems I: Regular Papers. 59: 1051-1060
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