Yongjune Kim, Ph.D.

Affiliations: 
2020-2022 Electrical Engineering and Computer Science Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu Metropolitan City, Republic of Korea 
 2022- Electrical Engineering Pohang University of Science and Technology (POSTECH), Pohang, Gyeongsangbuk-do, South Korea 
Area:
coding theory, information theory, machine learning
Website:
https://iil.postech.ac.kr
Google:
"Yongjune Kim"

Parents

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Vijayakumar Bhagavatula grad student 2011-2016 Carnegie Mellon (Computer Science Tree)
Naresh R. Shanbhag post-doc 2016-2018 UIUC
Lav R. Varshney post-doc 2016-2018 UIUC (Neurotree)
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Publications

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Kim Y, Raman RK, Kim Y, et al. (2019) Efficient Local Secret Sharing for Distributed Blockchain Systems Ieee Communications Letters. 23: 282-285
Sakr C, Kim Y, Shanbhag N. (2019) Minimum Precision Requirements of General Margin Hyperplane Classifiers Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 9: 253-266
Kim Y, Kang M, Varshney LR, et al. (2018) Generalized Water-Filling for Source-Aware Energy-Efficient SRAMs Ieee Transactions On Communications. 66: 4826-4841
Kim Y, Kumar BVKV. (2018) Redundancy allocation in finite-length nested codes for nonvolatile memories Journal of Communications and Networks. 20: 354-365
Kim Y, Sharma AA, Mateescu R, et al. (2016) Locally Rewritable Codes for Resistive Memories Ieee Journal On Selected Areas in Communications. 34: 2470-2485
Kim Y, Vijaya Kumar BVK, Cho KL, et al. (2013) Modulation coding for flash memories 2013 International Conference On Computing, Networking and Communications, Icnc 2013. 961-967
Kim Y, Kim J, Kong JJ, et al. (2012) Verify level control criteria for multi-level cell flash memories and their applications Coding and Signal Processing for Non-Volatile Memories Eurasip Journal On Advances in Signal Processing. 2012
Kim Y, Kim H, Rim M, et al. (2009) On the Optimal Cyclic Delay Value in Cyclic Delay Diversity Ieee Transactions On Broadcasting. 55: 790-795
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