Shounak Dhar

Affiliations: 
2019 University of Texas at Austin, Austin, Texas, U.S.A. 
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"Shounak Dhar"
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Ying Z, Feng C, Zhao Z, et al. (2020) Electronic-photonic arithmetic logic unit for high-speed computing. Nature Communications. 11: 2154
Lin Y, Jiang Z, Gu J, et al. (2020) DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 1-1
Ying Z, Zhao Z, Feng C, et al. (2018) Automated logic synthesis for electro-optic logic-based integrated optical computing. Optics Express. 26: 28002-28012
Ying Z, Wang Z, Zhao Z, et al. (2018) Silicon microdisk-based full adders for optical computing. Optics Letters. 43: 983-986
Li W, Dhar S, Pan DZ. (2018) UTPlaceF: A Routability-Driven FPGA Placer With Physical and Congestion Aware Packing Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 869-882
Ying Z, Dhar S, Zhao Z, et al. (2018) Electro-Optic Ripple-Carry Adder in Integrated Silicon Photonics for Optical Computing Ieee Journal of Selected Topics in Quantum Electronics. 24: 1-10
Ying Z, Wang Z, Zhao Z, et al. (2018) Comparison of microrings and microdisks for high-speed optical modulation in silicon photonics Applied Physics Letters. 112: 111108
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