Georges Gielen

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1990 Katholieke Universiteit Leuven, Belgium 
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"Georges Gielen"
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Van Assche J, Gielen G. (2020) Power Efficiency Comparison of Event-Driven and Fixed-Rate Signal Conversion and Compression for Biomedical Applications. Ieee Transactions On Biomedical Circuits and Systems. 14: 746-756
Xama N, Andraud M, Gomez J, et al. (2020) Machine Learning-based Defect Coverage Boosting of Analog Circuits under Measurement Variations Acm Transactions On Design Automation of Electronic Systems. 25: 1-27
Liu H, Xing X, Gielen G. (2020) A 0-dB STF-Peaking 85-MHz BW 74.4-dB SNDR CT ΔΣ ADC With Unary-Approximating DAC Calibration in 28-nm CMOS Ieee Journal of Solid-State Circuits. 1-1
Sacco E, Vergauwen J, Gielen G. (2020) A 16.1-bit Resolution 0.064-mm 2 Compact Highly Digital Closed-Loop Single-VCO-Based 1-1 Sturdy-MASH Resistance-to-Digital Converter With High Robustness in 180-nm CMOS Ieee Journal of Solid-State Circuits. 55: 2456-2467
Simicic M, Weckx P, Parvais B, et al. (2019) Understanding the Impact of Time-Dependent Random Variability on Analog ICs: From Single Transistor Measurements to Circuit Simulations Ieee Transactions On Very Large Scale Integration Systems. 27: 601-610
Sacco E, Marin J, Vergauwen J, et al. (2019) Performance Limitation Analysis of Highly-Digital Time-Based Closed-Loop Sensor-to-Digital Converter Architectures Ieee Transactions On Circuits and Systems Ii-Express Briefs. 66: 1114-1118
Marin J, Sacco E, Vergauwen J, et al. (2019) A Robust BBPLL-Based 0.18- $\mu$ m CMOS Resistive Sensor Interface With High Drift Resilience Over a −40 °C–175 °C Temperature Range Ieee Journal of Solid-State Circuits. 54: 1862-1873
Marin J, Sacco E, Vergauwen J, et al. (2018) Modeling and Analysis of Drift-Cancellation Techniques for Time-Based Integrated Resistive Sensor Interfaces Ieee Transactions On Components, Packaging and Manufacturing Technology. 8: 1203-1212
Esen B, Coyette A, Xama N, et al. (2018) An Automated Low-Cost Analog and Mixed-Signal DfT Method Using Testing Diodes Ieee Design & Test of Computers. 35: 15-23
Coyette A, Esen B, Xama N, et al. (2018) ADAGE: Automatic DfT-Assisted Generation of Test Stimuli for Mixed- Signal Integrated Circuits Ieee Design & Test of Computers. 35: 24-30
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