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Kaushik Ravindran, Ph.D. - Publications

Affiliations: 
2008 University of California, Berkeley, Berkeley, CA, United States 
Area:
Computer Architecture & Engineering (ARC); Design, Modeling and Analysis (DMA); Scientific Computing (SCI)
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12 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2012 Andrade HA, Ghosal A, Ravindran K, Evans BL. A methodology for the design and deployment of reliable systems on heterogeneous platforms 2012 International Conference On Reconfigurable Computing and Fpgas, Reconfig 2012. DOI: 10.1109/ReConFig.2012.6416722  0.392
2012 Ravindran K, Ghosal A, Limaye R, Andrade H, Asenjo A, Inoue T, Kim D, Prasad A, Tran TN, Trimborn M, Wang G, Yang G. Tools for deploying dataflow models on FPGA targets Conference On Design and Architectures For Signal and Image Processing, Dasip. 401-402.  0.302
2009 Abu-Mahmeed S, McCosh C, Budimlić Z, Kennedy K, Ravindran K, Hogan K, Austin P, Rogers S, Kornerup J. Scheduling tasks to maximize usage of aggregate variables in place Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 5501: 204-219. DOI: 10.1007/978-3-642-00722-4_15  0.337
2008 Satish NR, Ravindran K, Keutzer K. Scheduling task dependence graphs with variable task execution times onto heterogeneous multiprocessors Proceedings of the 8th Acm International Conference On Embedded Software, Emsoft'08. 149-158.  0.692
2007 Satish N, Ravindran K, Keutzer K. A decomposition-based constraint optimization approach for statically scheduling task graphs with communication delays to multiprocessors Proceedings -Design, Automation and Test in Europe, Date. 57-62. DOI: 10.1109/DATE.2007.364567  0.699
2007 Chong J, Satish N, Catanzaro B, Ravindran K, Keutzer K. Efficient parallelization of H.264 decoding with macro block level scheduling Proceedings of the 2007 Ieee International Conference On Multimedia and Expo, Icme 2007. 1874-1877.  0.693
2006 Visweswariah C, Ravindran K, Kalafala K, Walker SG, Narayan S, Beece DK, Piaget J, Venkateswaran N, Hemmett JG. First-order incremental block-based statistical timing analysis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 2170-2179. DOI: 10.1109/Tcad.2005.862751  0.446
2005 Ravindran K, Satish N, Jin Y, Keutzer K. An FPGA-based soft multiprocessor system for IPV4 packet forwarding Proceedings - 2005 International Conference On Field Programmable Logic and Applications, Fpl. 2005: 487-492. DOI: 10.1109/FPL.2005.1515769  0.727
2005 Shah N, Plishker W, Ravindran K, Gries M, Weber S, Mihal A, Kulkarni C, Moskewicz M, Sauer C, Keutzer K. Successfully deploying the ASIP Building Asips: the Mescal Methodology. 179-225. DOI: 10.1007/0-387-26128-1_6  0.732
2005 Jin Y, Satish N, Ravindran K, Keutzer K. An automated exploration framework for FPGA-based soft multiprocessor systems Codes+Isss 2005 - International Conference On Hardware/Software Codesign and System Synthesis. 273-278.  0.732
2005 Jin Y, Plishker W, Ravindran K, Satish N, Keutzer K. Soft multiprocessor systems for network applications Acm/Sigda International Symposium On Field Programmable Gate Arrays - Fpga. 271.  0.716
2004 Shah N, Plishker W, Ravindran K, Keutzer K. NP-click: A productive software development approach for network processors Ieee Micro. 24: 45-54. DOI: 10.1109/Mm.2004.53  0.673
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