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Kwang-Ting (Tim) Cheng - Publications

Affiliations: 
Electrical & Computer Engineering University of California, Santa Barbara, Santa Barbara, CA, United States 
Area:
Computer Engineering
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47 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Huang T, Lei T, Shao L, Sivapurapu S, Swaminathan M, Bao Z, Cheng K, Beausoleil R. Process design kit and design automation for flexible hybrid electronics Journal of the Society For Information Display. 28: 241-251. DOI: 10.1002/Jsid.876  0.588
2019 Huang T, Lei T, Shao L, Sivapurapu S, Swaminathan M, Bao Z, Cheng K, Beausoleil R. Process Design Kit and Design Automation for Flexible Hybrid Electronics Journal of Microelectronics and Electronic Packaging. 16: 117-123. DOI: 10.4071/Imaps.925849  0.6
2019 Dang Y, Chen P, Liang R, Huang C, Tang Y, Yu T, Yang X, Cheng K. Real-Time Semantic Plane Reconstruction on a Monocular Drone Using Sparse Fusion Ieee Transactions On Vehicular Technology. 68: 7383-7391. DOI: 10.1109/Tvt.2019.2923676  0.398
2019 Yang X, Gao Y, Luo H, Liao C, Cheng K. Bayesian DeNet: Monocular Depth Prediction and Frame-Wise Fusion With Synchronized Uncertainty Ieee Transactions On Multimedia. 21: 2701-2713. DOI: 10.1109/Tmm.2019.2912121  0.383
2019 Luo H, Gao Y, Wu Y, Liao C, Yang X, Cheng K. Real-Time Dense Monocular SLAM With Online Adapted Depth Prediction Network Ieee Transactions On Multimedia. 21: 470-483. DOI: 10.1109/Tmm.2018.2859034  0.398
2019 Yang X, Chen J, Dang Y, Luo H, Tang Y, Liao C, Chen P, Cheng K. Fast Depth Prediction and Obstacle Avoidance on a Monocular Drone Using Probabilistic Convolutional Neural Network Ieee Transactions On Intelligent Transportation Systems. 1-12. DOI: 10.1109/Tits.2019.2955598  0.399
2019 Shao L, Lei T, Huang T, Li S, Chu T, Wong M, Beausoleil R, Bao Z, Cheng K. Compact Modeling of Thin-Film Transistors for Flexible Hybrid IoT Design Ieee Design & Test of Computers. 36: 6-14. DOI: 10.1109/Mdat.2019.2899058  0.596
2019 Yang X, Lin Y, Su J, Wang X, Li X, Lin J, Cheng K. A Two-Stage Convolutional Neural Network for Pulmonary Embolism Detection From CTPA Images Ieee Access. 7: 84849-84857. DOI: 10.1109/Access.2019.2925210  0.363
2019 Yang X, Luo H, Wu Y, Gao Y, Liao C, Cheng K. Reactive obstacle avoidance of monocular quadrotors with online adapted depth prediction network Neurocomputing. 325: 142-158. DOI: 10.1016/J.Neucom.2018.10.019  0.386
2019 Liu Z, Luo W, Wu B, Yang X, Liu W, Cheng K. Bi-Real Net: Binarizing Deep Network Towards Real-Network Performance International Journal of Computer Vision. 128: 202-219. DOI: 10.1007/S11263-019-01227-8  0.369
2017 Zhang Z, Wu R, Wang Y, Zhang C, Stanton EJ, Schow CL, Cheng K, Bowers JE. Compact Modeling for Silicon Photonic Heterogeneously Integrated Circuits Journal of Lightwave Technology. 35: 2973-2980. DOI: 10.1109/Jlt.2017.2706721  0.404
2017 Yang X, Guo J, Xue T, Cheng K. Robust and real-time pose tracking for augmented reality on mobile devices Multimedia Tools and Applications. 77: 6607-6628. DOI: 10.1007/S11042-017-4575-3  0.398
2017 Martínez-Cruz A, Barrón-Fernández R, Molina-Lozano H, Ramírez-Salinas M, Villa-Vargas L, Cortés-Antonio P, Cheng K(. An Automatic Functional Coverage for Digital Systems Through a Binary Particle Swarm Optimization Algorithm with a Reinitialization Mechanism Journal of Electronic Testing. 33: 431-447. DOI: 10.1007/S10836-017-5665-X  0.342
2014 Xiang D, Sui W, Yin B, Cheng K. Compact Test Generation With an Influence Input Measure for Launch-On-Capture Transition Fault Testing Ieee Transactions On Very Large Scale Integration Systems. 22: 1968-1979. DOI: 10.1109/Tvlsi.2013.2280170  0.364
2014 Xu D, Li H, Ghofrani A, Cheng K, Han Y, Li X. Test-Quality Optimization for Variable n-Detections of Transition Faults Ieee Transactions On Very Large Scale Integration Systems. 22: 1738-1749. DOI: 10.1109/Tvlsi.2013.2278172  0.363
2014 Li K, Pan Y, Chen F, Cheng K, Huan R. Real-time lossless ECG compression for low-power wearable medical devices based on adaptive region prediction Electronics Letters. 50: 1904-1906. DOI: 10.1049/El.2014.3058  0.35
2013 Chang HC, Huang J, Kwai D, Cheng K, Wu C. Low-Cost Error Tolerance Scheme for 3-D CMOS Imagers Ieee Transactions On Very Large Scale Integration Systems. 21: 465-474. DOI: 10.1109/Tvlsi.2012.2190148  0.306
2011 Huang T, Fukuda K, Lo C, Yeh Y, Sekitani T, Someya T, Cheng K. Pseudo-CMOS: A Design Style for Low-Cost and Robust Flexible Electronics Ieee Transactions On Electron Devices. 58: 141-150. DOI: 10.1109/Ted.2010.2088127  0.633
2011 Chang H, Lin K, Cheng K. Tester-Assisted Calibration and Screening for Digitally-Calibrated ADCs Ieee Transactions On Circuits and Systems. 58: 2838-2848. DOI: 10.1109/Tcsi.2011.2158706  0.652
2011 Gao M, Chang H, Lisherness P, Cheng K. Time-Multiplexed Online Checking Ieee Transactions On Computers. 60: 1300-1312. DOI: 10.1109/Tc.2011.34  0.63
2011 Huang T, Huang J, Cheng K. Robust Circuit Design for Flexible Electronics Ieee Design & Test of Computers. 28: 8-15. DOI: 10.1109/Mdt.2011.74  0.629
2011 Huang J, Cheng K(. A Promising Alternative to Conventional Silicon Ieee Design & Test of Computers. 28: 6. DOI: 10.1109/Mdt.2011.117  0.348
2011 Fukuda K, Sekitani T, Yokota T, Kuribara K, Huang T, Sakurai T, Zschieschang U, Klauk H, Ikeda M, Kuwabara H, Yamamoto T, Takimiya K, Cheng K, Someya T. Organic Pseudo-CMOS Circuits for Low-Voltage Large-Gain High-Speed Operation Ieee Electron Device Letters. 32: 1448-1450. DOI: 10.1109/Led.2011.2161747  0.573
2009 Cheng K(, Huang T. What is flexible electronics Acm Sigda Newsletter. 39: 1-1. DOI: 10.1145/1862894.1862895  0.58
2009 Huang T, Cheng K. Design for Low Power and Reliable Flexible Electronics: Self-Tunable Cell-Library Design Ieee\/Osa Journal of Display Technology. 5: 206-215. DOI: 10.1109/Jdt.2008.2010273  0.634
2008 Huang T, Cheng K(, Tseng H, Kung C. Reliability analysis for flexible electronics: Case study of integrated a-Si:H TFT scan driver Acm Journal On Emerging Technologies in Computing Systems. 4: 12. DOI: 10.1145/1389089.1389092  0.635
2008 Ong C, Hong D, Cheng K, Wang L. A Clock-Less Jitter Spectral Analysis Technique Ieee Transactions On Circuits and Systems. 55: 2263-2272. DOI: 10.1109/Tcsi.2008.918235  0.67
2006 Cheng K. The New World of ESL Design Ieee Design & Test of Computers. 23: 333-333. DOI: 10.1109/Mdt.2006.135  0.353
2005 Feng T, Wang L, Cheng K(, Lin C(. Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator Acm Transactions On Design Automation of Electronic Systems. 10: 627-650. DOI: 10.1145/1109118.1109122  0.562
2004 Wang L, Liou J, Cheng K. Critical Path Selection for Delay Fault Testing Based Upon a Statistical Timing Model Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 1550-1565. DOI: 10.1109/Tcad.2004.835137  0.587
2003 Hong H, Huang J, Cheng K, Wu C, Kwai D. Practical considerations in applying /spl Sigma/-/spl Delta/ modulation-based analog BIST to sampled-data systems Ieee Transactions On Circuits and Systems Ii: Analog and Digital Signal Processing. 50: 553-566. DOI: 10.1109/Tcsii.2003.814812  0.361
2003 Liou J, Krstic A, Jiang Y, Cheng K. Modeling, testing, and analysis for delay defects and noise effects in deep submicron devices Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 22: 756-769. DOI: 10.1109/Tcad.2003.811442  0.584
2003 Wang L, Feng T, Cheng K(, Abadir MS, Pandey M. Enhanced Symbolic Simulation for Functional Verification of Embedded Array Systems Design Automation For Embedded Systems. 8: 173-188. DOI: 10.1023/B:Daem.0000003961.86651.2B  0.556
2002 Krstic A, Lai W, Cheng K, Chen L, Dey S. Embedded software-based self-test for programmable core-based designs Ieee Design & Test of Computers. 19: 18-27. DOI: 10.1109/Mdt.2002.1018130  0.553
2001 Huang S, Cheng K, Chen K. Verifying sequential equivalence using ATPG techniques Acm Transactions On Design Automation of Electronic Systems. 6: 244-275. DOI: 10.1145/375977.376022  0.406
2000 Lai W, Krstic A, Cheng K. Functionally testable path delay faults on a microprocessor Ieee Design & Test of Computers. 17: 6-14. DOI: 10.1109/54.895002  0.556
1999 Cheng K, Huang S, Dai W. Fault emulation: A new methodology for fault grading Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 18: 1487-1495. DOI: 10.1109/43.790625  0.357
1999 Huang S, Chen K, Cheng K. AutoFix: a hybrid tool for automatic logic rectification Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 18: 1376-1384. DOI: 10.1109/43.784128  0.376
1998 Tsai H, Cheng K, Lin C, Bhawmik S. Efficient test-point selection for scan-based BIST Ieee Transactions On Very Large Scale Integration Systems. 6: 667-676. DOI: 10.1109/92.736140  0.373
1997 Krstić A, Cheng K. Resynthesis of Combinational Circuits for Path Count Reduction and for Path Delay Fault Testability Journal of Electronic Testing. 11: 43-54. DOI: 10.1023/A:1008295716980  0.396
1996 Cheng K. Gate-level test generation for sequential circuits Acm Transactions On Design Automation of Electronic Systems. 1: 405-442. DOI: 10.1145/238997.238999  0.405
1996 Cheng K, Krishnakumar AS. Automatic generation of functional vectors using the extended finite state machine model Acm Transactions On Design Automation of Electronic Systems. 1: 57-79. DOI: 10.1145/225871.225880  0.329
1996 Cheng K, Krstic A, Chen H. Generation of high quality tests for robustly untestable path delay faults Ieee Transactions On Computers. 45: 1379-1392. DOI: 10.1109/12.545968  0.346
1996 Pan C, Cheng K, Gupta S. Fault macromodeling and a testing strategy for opamps Journal of Electronic Testing. 9: 225-235. DOI: 10.1007/Bf00134688  0.342
1995 Entrena LA, Cheng K. Combinational and sequential logic optimization by redundancy addition and removal Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 14: 909-916. DOI: 10.1109/43.391740  0.382
1994 Chakraborty TJ, Davidson S, Maamari F, Cheng K. Automatic test generation for digital electronic circuits At&T Technical Journal. 73: 19-29. DOI: 10.1002/J.1538-7305.1994.Tb00575.X  0.409
1991 Cheng K, Agrawal VD. Methods for synthesizing testable sequential circuits At&T Technical Journal. 70: 64-86. DOI: 10.1002/J.1538-7305.1991.Tb00498.X  0.391
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