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Mohit Tiwari, Ph.D. - Publications

Affiliations: 
2011 Computer Science University of California, Santa Barbara, Santa Barbara, CA, United States 
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20 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2019 Sethumadhavan S, Tiwari M. Secure Architectures Ieee Micro. DOI: 10.1109/Mm.2019.2925152  0.335
2016 Tiwari M, Austin T. On Architectural Support for Systems Security Ieee Micro. 36: 6-7. DOI: 10.1109/Mm.2016.89  0.367
2014 Hu W, Mu D, Oberg J, Mao B, Tiwari M, Sherwood T, Kastner R. Gate-level information flow tracking for security lattices Acm Transactions On Design Automation of Electronic Systems. 20. DOI: 10.1145/2676548  0.758
2013 Li X, Kashyap V, Oberg JK, Tiwari M, Rajarathinam VR, Kastner R, Sherwood T, Hardekopf B, Chong FT. Position paper: Sapper - A language for provable hardware policy enforcement Plas 2013 - Proceedings of the 2013 Acm Sigplan Workshop On Programming Languages and Analysis For Security, Co-Located With Pldi 2013. 39-44. DOI: 10.1145/2465106.2465214  0.37
2012 Mazloom B, Mysore S, Tiwari M, Agrawal B, Sherwood T. Dataflow tomography: Information flow tracking for understanding and visualizing full systems Transactions On Architecture and Code Optimization. 9. DOI: 10.1145/2133382.2133385  0.657
2012 Hu W, Oberg J, Irturk A, Tiwari M, Sherwood T, Mu D, Kastner R. On the complexity of generating gate level information flow tracking logic Ieee Transactions On Information Forensics and Security. 7: 1067-1080. DOI: 10.1109/Tifs.2012.2189105  0.757
2012 Wassel HMG, Dai D, Tiwari M, Valamehr JK, Theogarajan L, Dionne J, Chong FT, Sherwood T. Opportunities and challenges of using plasmonic components in nanophotonic architectures Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 2: 154-168. DOI: 10.1109/Jetcas.2012.2193934  0.693
2011 Tiwari M, Oberg JK, Li X, Valamehr J, Levin T, Hardekopf B, Kastner R, Chong FT, Sherwood T. Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security Proceedings - International Symposium On Computer Architecture. 189-199. DOI: 10.1145/2000064.2000087  0.76
2011 Li X, Tiwari M, Oberg JK, Kashyap V, Chong FT, Sherwood T, Hardekopf B. Caisson: A hardware description language for secure information flow Proceedings of the Acm Sigplan Conference On Programming Language Design and Implementation (Pldi). 109-120. DOI: 10.1145/1993498.1993512  0.37
2011 Hu W, Oberg J, Irturk A, Tiwari M, Sherwood T, Mu D, Kastner R. Theoretical fundamentals of gate level information flow tracking Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 30: 1128-1140. DOI: 10.1109/Tcad.2011.2120970  0.757
2011 Oberg J, Hu W, Irturk A, Tiwari M, Sherwood T, Kastner R. Information flow isolation in I2C and USB Proceedings - Design Automation Conference. 254-259.  0.435
2010 Valamehr J, Tiwari M, Sherwood T, Kastner R, Huffmire T, Irvine C, Levin T. Hardware assistance for trustworthy systems through 3-D integration Proceedings - Annual Computer Security Applications Conference, Acsac. 199-210. DOI: 10.1145/1920261.1920292  0.735
2010 Huffmire T, Levin T, Bilzor M, Irvine CE, Valamehr J, Tiwari M, Sherwood T, Kastner R. Hardware trust implications of 3-D integration Proceedings of the 5th Workshop On Embedded Systems Security, Wess '10. DOI: 10.1145/1873548.1873549  0.728
2010 Oberg J, Hu W, Irturk A, Tiwari M, Sherwood T, Kastner R. Theoretical analysis of gate level information flow tracking Proceedings - Design Automation Conference. 244-247. DOI: 10.1145/1837274.1837337  0.446
2010 Li X, Tiwari M, Hardekopf B, Sherwood T, Chong F. Secure information fow analysis for hardware design: Using the right abstraction for the job Proceedings of the Acm Sigplan 5th Workshop On Programming Languages and Analysis For Security, Plas 2010. DOI: 10.1145/1814217.1814225  0.363
2010 Tiwari M, Li X, Wassel HMG, Mazloom B, Mysore S, Chong FT, Sherwood T. Gate-level information-flow tracking for secure architectures Ieee Micro. 30: 92-100. DOI: 10.1109/Mm.2010.17  0.695
2009 Tiwari M, Li X, Wassel HMG, Chong FT, Sherwood T. Execution leases: A hardware-supported mechanism for enforcing strong non-interference Proceedings of the Annual International Symposium On Microarchitecture, Micro. 493-504. DOI: 10.1145/1669112.1669174  0.401
2009 Tiwari M, Wassel HMG, Mazloom B, Mysore S, Chong FT, Sherwood T. Complete information flow tracking from the gates up Acm Sigplan Notices. 44: 109-120.  0.441
2008 Tiwari M, Wassel HMG, Mazloom B, Mysore S, Chong FT, Sherwood T. Complete information flow tracking from thegGates up International Conference On Architectural Support For Programming Languages and Operating Systems - Asplos. 109-120. DOI: 10.1145/1508244.1508258  0.439
2008 Tiwari M, Agrawal B, Mysore S, Valamehr J, Sherwood T. A Small cache of large ranges: Hardware methods for efficiently searching, storing, and updating big dataflow tags Proceedings of the Annual International Symposium On Microarchitecture, Micro. 94-105. DOI: 10.1109/MICRO.2008.4771782  0.74
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