Paul V. Gratz, Ph.D. - Publications

Affiliations: 
2008 Electrical Engineering University of Texas at Austin, Austin, Texas, U.S.A. 
Area:
Electronics and Electrical Engineering, Computer Science

30 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2019 Wang P, McHale L, Gratz PV, Sprintson A. GenMatcher: A Generic Clustering-Based Arbitrary Matching Framework Acm Transactions On Architecture and Code Optimization. 15: 51. DOI: 10.1145/3281663  0.432
2019 Ramrakhyani A, Gratz PV, Krishna T. Synchronized Progress in Interconnection Networks (SPIN): A New Theory for Deadlock Freedom Ieee Micro. 39: 110-117. DOI: 10.1109/Mm.2019.2910249  0.475
2018 Yang YS, Deshpande H, Choi G, Gratz PV. SDPR: Improving Latency and Bandwidth in On-Chip Interconnect Through Simultaneous Dual-Path Routing Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 545-558. DOI: 10.1109/Tcad.2016.2570428  0.66
2018 AlBarakat LM, Gratz PV, Jimenez DA. MTB-Fetch: Multithreading Aware Hardware Prefetching for Chip Multiprocessors Ieee Computer Architecture Letters. 17: 175-178. DOI: 10.1109/Lca.2018.2847345  0.435
2016 Won JY, Gratz PV, Shakkottai S, Hu J. Resource sharing centric dynamic voltage and frequency scaling for CMP cores, uncore, and memory Acm Transactions On Design Automation of Electronic Systems. 21. DOI: 10.1145/2897394  0.487
2015 Kim J, Fedorov V, Gratz PV, Reddy ALN. Dynamic memory pressure aware ballooning Acm International Conference Proceeding Series. 5: 103-112. DOI: 10.1145/2818950.2818967  0.305
2015 Kim H, Boga SBK, Vitkovskiy A, Hadjitheophanous S, Gratz PV, Soteriou V, Michael MK. Use it or lose it: Proactive, deterministic longevity in future chip multiprocessors Acm Transactions On Design Automation of Electronic Systems. 20. DOI: 10.1145/2770873  0.456
2015 Rasheed S, Gratz PV, Shakkottai S, Hu J. STORM: A simple traffic-optimized router microarchitecture for networks-on-chip Proceedings - 2014 8th Ieee/Acm International Symposium On Networks-On-Chip, Nocs 2014. 176-177. DOI: 10.1109/NOCS.2014.7008781  0.623
2015 Vitkovskiy A, Soteriou V, Gratz PV. Clotho: Proactive wearout deceleration in Chip-Multiprocessor interconnects Proceedings of the 33rd Ieee International Conference On Computer Design, Iccd 2015. 117-124. DOI: 10.1109/ICCD.2015.7357092  0.402
2015 Li C, Gratz PV, Palermo S. Nano-Photonic networks-on-chip for future chip multiprocessors More Than Moore Technologies For Next Generation Computer Design. 155-186. DOI: 10.1007/978-1-4939-2163-8_7  0.584
2014 Yang YS, Kumar R, Choi G, Gratz PV. Wavesync: Low-latency source-synchronous bypass network-on-chip architecture Acm Transactions On Design Automation of Electronic Systems. 19. DOI: 10.1145/2647950  0.585
2014 Li C, Browning M, Gratz PV, Palermo S. LumiNOC: A power-efficient, high-performance, photonic network-on-chip Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 33: 826-838. DOI: 10.1109/Tcad.2014.2320510  0.622
2014 Kim H, Grot B, Gratz PV, Jiménez DA. Spatial locality speculation to reduce energy in chip-multiprocessor networks-on-chip Ieee Transactions On Computers. 63: 543-556. DOI: 10.1109/Tc.2012.238  0.534
2014 Mchale L, Case J, Gratz PV, Sprintson A. Stochastic pre-classification for SDN data plane matching Proceedings - International Conference On Network Protocols, Icnp. 596-602. DOI: 10.1109/ICNP.2014.95  0.443
2013 Fedorov VV, Qiu S, Reddy ALN, Gratz PV. ARI: Adaptive LLC-memory traffic management Transactions On Architecture and Code Optimization. 10. DOI: 10.1145/2543697  0.432
2013 Kim H, Vitkovskiy A, Gratz PV, Soteriou V. Use it or lose it: Wear-out and lifetime in future chip multiprocessors Micro 2013 - Proceedings of the 46th Annual Ieee/Acm International Symposium On Microarchitecture. 136-147. DOI: 10.1145/2540708.2540721  0.403
2013 Chen X, Xu Z, Kim H, Gratz P, Hu J, Kishinevsky M, Ogras U. In-network monitoring and control policy for DVFS of CMP networks-on-chip and last level caches Acm Transactions On Design Automation of Electronic Systems. 18: 1-21. DOI: 10.1145/2504905  0.588
2013 Chen X, Xu Z, Kim H, Gratz PV, Hu J, Kishinevsky M, Ogras U, Ayoub R. Dynamic voltage and frequency scaling for shared resources in multicore processor designs Proceedings - Design Automation Conference. DOI: 10.1145/2463209.2488874  0.416
2013 Ramakrishna M, Gratz PV, Sprintson A. GCA: Global congestion awareness for load balance in networks-on-chip 2013 7th Ieee/Acm International Symposium On Networks-On-Chip, Nocs 2013. DOI: 10.1109/Tpds.2015.2477840  0.48
2013 Browning M, Li C, Gratz PV, Palermo S. LumiNOC: A low-latency, high-bandwidth per Watt, photonic network-on-chip International Workshop On System Level Interconnect Prediction, Slip. DOI: 10.1109/SLIP.2013.6681679  0.536
2013 Ghoshal P, Casey CJ, Gratz PV, Sprintson A. Stochastic pre-classification for software defined firewalls Proceedings - International Conference On Computer Communications and Networks, Icccn. DOI: 10.1109/ICCCN.2013.6614198  0.389
2012 Li C, Browning M, Gratz PV, Palermo S. LumiNOC: A power-efficient, high-performance, photonic network-on-chip for future parallel architectures Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 421-422. DOI: 10.1145/2370816.2370876  0.53
2012 Li C, Browning M, Gratz PV, Palermo S. Energy-efficient optical broadcast for nanophotonic networks-on-chip 2012 Optical Interconnects Conference, Oic 2012. 64-65. DOI: 10.1109/OIC.2012.6224445  0.413
2012 Panda R, Gratz PV, Jimenez DA. B-Fetch: Branch prediction directed prefetching for in-order processors Ieee Computer Architecture Letters. 11: 41-44. DOI: 10.1109/L-Ca.2011.33  0.448
2011 Kim H, Ghoshal P, Grot B, Gratz PV, Jiménez DA. Reducing network-on-chip energy consumption through spatial locality speculation Nocs 2011: the 5th Acm/Ieee International Symposium On Networks-On-Chip. 233-240. DOI: 10.1145/1999946.1999983  0.442
2011 Lotlikar S, Pai V, Gratz PV. AcENoCs: A configurable HW/SW platform for FPGA accelerated NoC emulation Proceedings of the Ieee International Conference On Vlsi Design. 147-152. DOI: 10.1109/VLSID.2011.46  0.439
2011 Jain TNK, Ramakrishna M, Gratz PV, Sprintson A, Choi G. Asynchronous bypass channels for multi-synchronous NoCs: A router microarchitecture, topology, and routing algorithm Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 30: 1663-1676. DOI: 10.1109/Tcad.2011.2161190  0.551
2010 Jain TNK, Gratz PV, Sprintson A, Choi G. Asynchronous Bypass Channels: Improving performance for multi-synchronous NoCs Nocs 2010 - the 4th Acm/Ieee International Symposium On Networks-On-Chip. 51-58. DOI: 10.1109/NOCS.2010.15  0.464
2010 Kim H, Gratz P. Leveraging Unused Cache Block Words to Reduce Power in CMP Interconnect Ieee Computer Architecture Letters. 9: 33-36. DOI: 10.1109/L-Ca.2010.9  0.442
2007 Gratz P, Kim C, Sankaralingam K, Hanson H, Shivakumar P, Keckler SW, Burger D. On-chip interconnection networks of the TRIPS chip Ieee Micro. 27: 41-50. DOI: 10.1109/Mm.2007.90  0.433
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