Ramtilak Vemu, Ph.D. - Publications
Affiliations: | 2008 | Electrical Engineering | University of Texas at Austin, Austin, Texas, U.S.A. |
Area:
Electronics and Electrical Engineering, Computer ScienceYear | Citation | Score | |||
---|---|---|---|---|---|
2011 | Vemu R, Abraham J. CEDA: Control-flow error detection using assertions Ieee Transactions On Computers. 60: 1233-1245. DOI: 10.1109/Tc.2011.101 | 0.583 | |||
2009 | Sambamurthy S, Gurumurthy S, Vemu R, Abraham JA. Functionally valid gate-level peak power estimation for processors Proceedings of the 10th International Symposium On Quality Electronic Design, Isqed 2009. 753-758. DOI: 10.1109/ISQED.2009.4810387 | 0.543 | |||
2008 | Gurumurthy S, Vemu R, Abraham JA, Natarajan S. On efficient generation of instruction sequences to test for delay defects in a processor Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 279-284. DOI: 10.1145/1366110.1366178 | 0.596 | |||
2008 | Vemu R, Gurumurthy S, Abraham JA. ACCE: Automatic correction of control-flow errors Proceedings - International Test Conference. DOI: 10.1109/TEST.2007.4437639 | 0.584 | |||
2008 | Vemu R, Abraham JA. Budget-dependent control-flow error detection Proceedings - 14th Ieee International On-Line Testing Symposium, Iolts 2008. 73-78. DOI: 10.1109/IOLTS.2008.52 | 0.589 | |||
2008 | Vemu R, Jas A, Abraham JA, Patil S, Galivanche R. A low-cost concurrent error detection technique for processor control logic Proceedings -Design, Automation and Test in Europe, Date. 897-902. DOI: 10.1109/DATE.2008.4484788 | 0.562 | |||
2007 | Gurumurthy S, Vemu R, Abraham JA, Saab DG. Automatic generation of instructions to robustly test delay defects in processors Proceedings - 12th Ieee European Test Symposium, Ets 2007. 173-178. DOI: 10.1109/ETS.2007.13 | 0.602 | |||
2006 | Vemu R, Abraham JA. CEDA: Control-flow error detection through assertions Proceedings - Iolts 2006: 12th Ieee International On-Line Testing Symposium. 2006: 151-156. DOI: 10.1109/IOLTS.2006.14 | 0.46 | |||
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