☰

Hailong Jiao - Publications

Affiliations: 
2012 Electronic and Computer Engineering Hong Kong University of Science and Technology, Clear Water Bay, Kowloon, Hong Kong 
 2012- Eindhoven University of Technology, Eindhoven, Noord-Brabant, Netherlands 
Tree Info Similar researchers PubMed Report error

36 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Lam H, Guo F, Qiu H, Zhang M, Jiao H, Zhang S. Pseudo Multi-Port SRAM Circuit for Image Processing in Display Drivers Ieee Transactions On Circuits and Systems For Video Technology. 1-1. DOI: 10.1109/Tcsvt.2020.2979046  0.371
2020 Sun Y, He W, Mao Z, Jiao H, Kursun V. Monolithic 3D Carbon Nanotube Memory for Enhanced Yield and Integration Density Ieee Transactions On Circuits and Systems. 67: 2431-2441. DOI: 10.1109/Tcsi.2020.2980074  0.688
2020 Liang J, Yi S, Bai W, Wang L, Zhan C, Liao C, Lam H, Zhang M, Zhang S, Jiao H. A −80 dB PSRR 4.99 ppm/°C TC bandgap reference with nonlinear compensation Microelectronics Journal. 95: 104664. DOI: 10.1016/J.Mejo.2019.104664  0.406
2019 Huo X, Liao C, Zhang M, Jiao H, Zhang S. A Pixel Circuit With Wide Data Voltage Range for OLEDoS Microdisplays With High Uniformity Ieee Transactions On Electron Devices. 66: 4798-4804. DOI: 10.1109/Ted.2019.2939531  0.464
2018 Sun Y, He W, Mao Z, Jiao H, Kursun V. Metallic-CN-Removal-Tolerant High-Yield Six-CN-MOSFET SRAM Cell for Carbon-Based Embedded Memory Ieee Transactions On Electron Devices. 65: 1230-1238. DOI: 10.1109/Ted.2018.2798667  0.697
2018 Lam H, Wang Y, Zhang M, Jiao H, Zhang S. A Compact Pixel Circuit for Externally Compensated AMOLED Displays Ieee Journal of the Electron Devices Society. 6: 936-941. DOI: 10.1109/Jeds.2018.2861890  0.492
2017 Sun Y, He W, Mao Z, Jiao H, Kursun V. High-Yield and Robust 9T SRAM Cell Tolerant to Removal of Metallic Carbon Nanotubes Ieee Transactions On Device and Materials Reliability. 17: 20-31. DOI: 10.1109/Tdmr.2017.2668761  0.667
2016 Jiao H, Qiu Y, Kursun V. Variability-aware 7T SRAM circuit with low leakage high data stability SLEEP mode Integration, the Vlsi Journal. 53: 68-79. DOI: 10.1016/J.Vlsi.2015.12.003  0.691
2016 Jiao H, Qiu Y, Kursun V. Low power and robust memory circuits with asymmetrical ground gating Microelectronics Journal. 48: 109-119. DOI: 10.1016/J.Mejo.2015.11.009  0.75
2015 Salahuddin SM, Kursun V, Jiao H. Finfet sram cells with asymmetrical bitline access transistors for enhanced read stability Transactions On Electrical and Electronic Materials. 16: 293-302. DOI: 10.4313/Teem.2015.16.6.293  0.684
2014 Sun Y, Jiao H, Kursun V. A Novel Robust and Low-Leakage SRAM Cell With Nine Carbon Nanotube Transistors Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. DOI: 10.1109/Tvlsi.2014.2350674  0.709
2014 Jiao H, Kursun V. Mode transition timing and energy overhead analysis in noise-aware MTCMOS circuits Microelectronics Journal. 45: 1125-1131. DOI: 10.1016/J.Mejo.2014.05.006  0.714
2013 Jiao H, Kursun V. Characterization of mode transition timing overhead for net energy savings in low-noise MTCMOS circuits Ieee/Ifip International Conference On Vlsi and System-On-Chip, Vlsi-Soc. 150-155. DOI: 10.1109/VLSI-SoC.2013.6673267  0.685
2013 Jiao H, Kursun V. Reactivation noise suppression with sleep signal slew rate modulation in MTCMOS circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 21: 533-545. DOI: 10.1109/Tvlsi.2012.2190116  0.715
2013 Jiao H, Kursun V. Ground gated 8T SRAM cells with enhanced read and hold data stability Proceedings of Ieee Computer Society Annual Symposium On Vlsi, Isvlsi. 52-57. DOI: 10.1109/ISVLSI.2013.6654622  0.706
2013 Jiao H, Kursun V. Novel high electrical quality seven-transistor memory cell with asymmetrical ground gating Isocc 2013 - 2013 International Soc Design Conference. 255-258. DOI: 10.1109/ISOCC.2013.6864021  0.669
2012 Jiao H, Kursun V. Threshold voltage tuning for faster activation with lower noise in tri-mode MTCMOS circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 741-745. DOI: 10.1109/Tvlsi.2011.2110663  0.742
2012 Jiao H, Kursun V. Multi-phase sleep signal modulation for mode transition noise mitigation in MTCMOS circuits Isocc 2012 - 2012 International Soc Design Conference. 466-469. DOI: 10.1109/ISOCC.2012.6406897  0.67
2012 Jiao H, Kursun V. Full-custom design of low leakage data preserving ground gated 6T SRAM cells to facilitate single-ended write operations Iscas 2012 - 2012 Ieee International Symposium On Circuits and Systems. 484-487. DOI: 10.1109/ISCAS.2012.6272070  0.706
2012 Jiao H, Kursun V. Low power and robust ground gated memory banks with combined write assist techniques 2012 Ieee Faible Tension Faible Consommation, Ftfc 2012. DOI: 10.1109/FTFC.2012.6231727  0.713
2011 Jiao H, Kursun V. Noise-aware data preserving sequential MTCMOS circuits with dynamic forward body bias Journal of Circuits, Systems and Computers. 20: 125-145. DOI: 10.1142/S0218126611007116  0.743
2011 Jiao H, Kursun V. Asymmetrical ground gating for low leakage and data robust sleep mode in memory banks Proceedings of 2011 International Symposium On Vlsi Design, Automation and Test, Vlsi-Dat 2011. 205-208. DOI: 10.1109/VDAT.2011.5783611  0.733
2011 Jiao H, Kursun V. Ground bouncing noise suppression techniques for data preserving sequential MTCMOS circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 19: 763-773. DOI: 10.1109/Tvlsi.2009.2039761  0.744
2011 Jiao H, Kursun V. Sleep signal slew rate modulation for mode transition noise suppression in ground gated integrated circuits International System On Chip Conference. 365-370. DOI: 10.1109/SOCC.2011.6085093  0.719
2010 Jiao H, Kursun V. Low-leakage and compact registers with easy-sleep mode Journal of Low Power Electronics. 6: 263-279. DOI: 10.1166/Jolpe.2010.1080  0.719
2010 Jiao H, Kursun V. Reactivation noise suppression with threshold voltage tuning in sequential MTCMOS circuits Proceedings of the 2010 18th Ieee/Ifip International Conference On Vlsi and System-On-Chip, Vlsi-Soc 2010. 347-351. DOI: 10.1109/VLSISOC.2010.5642685  0.7
2010 Jiao H, Kursun V. Ground-bouncing-noise-aware combinational MTCMOS circuits Ieee Transactions On Circuits and Systems I: Regular Papers. 57: 2053-2065. DOI: 10.1109/Tcsi.2010.2041505  0.73
2010 Jiao H, Kursun V. Power gated SRAM circuits with data retention capability and high immunity to noise: A comparison for reliability in low leakage sleep mode 2010 International Soc Design Conference, Isocc 2010. 5-8. DOI: 10.1109/SOCDC.2010.5682988  0.718
2010 Jiao H, Kursun V. How forward body bias helps to reduce ground bouncing noise and silicon area in MTCMOS circuits: Divulging the basic mechanism 2010 International Soc Design Conference, Isocc 2010. 9-12. DOI: 10.1109/SOCDC.2010.5682985  0.666
2010 Jiao H, Kursun V. Smooth awakenings: Reactivation noise suppressed low-leakage and robust MTCMOS flip-flops Iscas 2010 - 2010 Ieee International Symposium On Circuits and Systems: Nano-Bio Circuit Fabrics and Systems. 3845-3848. DOI: 10.1109/ISCAS.2010.5537716  0.7
2010 Jiao H, Kursun V. High-speed and low-leakage MTCMOS memory registers Proceedings of the 2nd Asia Symposium On Quality Electronic Design, Asqed 2010. 17-22. DOI: 10.1109/ASQED.2010.5548162  0.681
2010 Jiao H, Kursun V. Dynamic forward body bias enhanced tri-mode MTCMOS Proceedings of the 2nd Asia Symposium On Quality Electronic Design, Asqed 2010. 33-37. DOI: 10.1109/ASQED.2010.5548161  0.72
2009 Jiao H, Kursun V. Sleep transistor forward body bias: An extra knob to lower ground bouncing noise in MTCMOS circuits 2009 International Soc Design Conference, Isocc 2009. 216-219. DOI: 10.1109/SOCDC.2009.5423813  0.697
2009 Jiao H, Kursun V. Ground bouncing noise suppression techniques for MTCMOS circuits 2009 1st Asia Symposium On Quality Electronic Design, Asqed 2009. 64-70. DOI: 10.1109/ASQED.2009.5206297  0.714
2009 Jiao H, Kursun V. Ground bouncing noise aware sequential MTCMOS circuits with data retention capability Isic-2009 - 12th International Symposium On Integrated Circuits, Proceedings. 534-537.  0.694
2008 Jiao H, Chen L. Cellwise OPC based on reduced standard cell library Proceedings of the 9th International Symposium On Quality Electronic Design, Isqed 2008. 810-814. DOI: 10.1109/ISQED.2008.4479842  0.318
Show low-probability matches.