☰

David Richard Kaeli - Publications

Affiliations: 
Northeastern University, Boston, MA, United States 
Area:
Computer Architecture, Cybersecurity, Performance Analysis
Website:
https://coe.northeastern.edu/people/kaeli-david/
Tree Info Similar researchers PubMed Report error

41 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Previlon FG, Kalra C, tiwari d, Kaeli DR. Characterizing and Exploiting Soft Error Vulnerability Phase Behavior in GPU Applications Ieee Transactions On Dependable and Secure Computing. 1-1. DOI: 10.1109/Tdsc.2020.2991136  0.31
2019 Gong X, Gong X, Yu L, Kaeli D. HAWS: Accelerating GPU Wavefront Execution through Selective Out-of-order Execution Acm Transactions On Architecture and Code Optimization. 16: 15. DOI: 10.1145/3291050  0.399
2019 Santos FFd, Pimenta PF, Lunardi C, Draghetti L, Carro L, Kaeli D, Rech P. Analyzing and Increasing the Reliability of Convolutional Neural Networks on GPUs Ieee Transactions On Reliability. 68: 663-677. DOI: 10.1109/Tr.2018.2878387  0.353
2019 Wang L, Zhao X, Kaeli D, Wang Z, Eeckhout L. Intra-Cluster Coalescing and Distributed-Block Scheduling to Reduce GPU NoC Pressure Ieee Transactions On Computers. 68: 1064-1076. DOI: 10.1109/Tc.2019.2895036  0.333
2019 Li C, Yang J, Sun Y, Jin L, Xu L, Cao Z, Fan P, Kaeli D, Ma S, Guo Y. Priority-Based PCIe Scheduling for Multi-Tenant Multi-GPU Systems Ieee Computer Architecture Letters. 18: 157-160. DOI: 10.1109/Lca.2019.2955119  0.372
2018 Yu L, Nina-Paravecino F, Kaeli D, Fang Q. Scalable and massively parallel Monte Carlo photon transport simulations for heterogeneous computing platforms. Journal of Biomedical Optics. 23: 1-4. PMID 29374404 DOI: 10.1117/1.Jbo.23.1.010504  0.366
2018 Tavana MK, Ziabari AK, Kaeli D. Block Cooperation: Advancing Lifetime of Resistive Memories by Increasing Utilization of Error Correcting Codes Acm Transactions On Architecture and Code Optimization. 15: 36. DOI: 10.1145/3243906  0.38
2018 Lunardi C, Previlon F, Kaeli D, Rech P. On the Efficacy of ECC and the Benefits of FinFET Transistor Layout for GPU Reliability Ieee Transactions On Nuclear Science. 65: 1843-1850. DOI: 10.1109/Tns.2018.2823786  0.349
2018 Villegas A, Asenjo R, Navarro A, Plata O, Kaeli D. Lightweight Hardware Transactional Memory for GPU Scratchpad Memory Ieee Transactions On Computers. 67: 816-829. DOI: 10.1109/Tc.2017.2776908  0.35
2017 Tavana MK, Fei Y, Kaeli DR. Nacre: Durable, Secure and Energy-efficient Non-Volatile Memory Utilizing Data Versioning Ieee Transactions On Emerging Topics in Computing. 1-1. DOI: 10.1109/Tetc.2017.2787622  0.385
2016 Ziabari AK, Sun Y, Ma Y, Schaa D, Abellán JL, Ubal R, Kim J, Joshi A, Kaeli D. UMH Acm Transactions On Architecture and Code Optimization. 13: 1-25. DOI: 10.1145/2996190  0.374
2016 Momeni A, Tabkhi H, Ukidave Y, Schirner G, Kaeli D. Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA Acm Sigarch Computer Architecture News. 43: 52-57. DOI: 10.1145/2927964.2927974  0.409
2015 Quinn H, Robinson WH, Rech P, Aguirre M, Barnard A, Desogus M, Entrena L, Garcia-Valderas M, Guertin SM, Kaeli D, Kastensmidt FL, Kiddie BT, Sanchez-Clemente A, Reorda MS, Sterpone L, et al. Using Benchmarks for Radiation Testing of Microprocessors and FPGAs Ieee Transactions On Nuclear Science. 62: 2547-2554. DOI: 10.1109/Tns.2015.2498313  0.356
2015 Valero A, Petit S, Sahuquillo J, Kaeli DR, Duato J. A reuse-based refresh policy for energy-aware eDRAM caches Microprocessors and Microsystems. 39: 37-48. DOI: 10.1016/J.Micpro.2014.12.001  0.358
2014 Azmandian F, Yilmazer A, Dy JG, Aslam JA, Kaeli DR. Harnessing the power of GPUs to speed up feature selection for outlier detection Journal of Computer Science and Technology. 29: 408-422. DOI: 10.1007/S11390-014-1439-4  0.73
2014 Sun E, Kaeli D. Aggressive Value Prediction on a GPU International Journal of Parallel Programming. 42: 30-48. DOI: 10.1007/S10766-012-0232-7  0.416
2012 Fang Q, Kaeli DR. Accelerating mesh-based Monte Carlo method on modern CPU architectures. Biomedical Optics Express. 3: 3223-30. PMID 23243572 DOI: 10.1364/Boe.3.003223  0.351
2012 Ubal R, Sahuquillo J, Petit S, Lopez P, Kaeli D. A Sequentially Consistent Multiprocessor Architecture for Out-of-Order Retirement of Instructions Ieee Transactions On Parallel and Distributed Systems. 23: 1361-1368. DOI: 10.1109/Tpds.2011.255  0.369
2012 Wang J, Geiler A, Mistry P, Kaeli DR, Harris VG, Vittoria C. Design and simulation of self-biased circulators in the ultra high frequency band Journal of Magnetism and Magnetic Materials. 324: 991-994. DOI: 10.1016/J.Jmmm.2011.10.006  0.61
2011 Azmandian F, Moffie M, Alshawabkeh M, Dy J, Aslam J, Kaeli D. Virtual machine monitor-based lightweight intrusion detection Operating Systems Review. 45: 38-53. DOI: 10.1145/2007183.2007189  0.602
2011 Bader DA, Kaeli D, Kindratenko V. Guest Editor's Introduction: Special Issue on High-Performance Computing with Accelerators Ieee Transactions On Parallel and Distributed Systems. 22: 3-6. DOI: 10.1109/Tpds.2011.8  0.344
2011 Jang B, Schaa D, Mistry P, Kaeli D. Exploiting Memory Access Patterns to Improve Memory Performance in Data-Parallel Architectures Ieee Transactions On Parallel and Distributed Systems. 22: 105-118. DOI: 10.1109/Tpds.2010.107  0.757
2011 Goodman JA, Kaeli D, Schaa D. Accelerating an imaging spectroscopy algorithm for submerged marine environments using graphics processing units Ieee Journal of Selected Topics in Applied Earth Observations and Remote Sensing. 4: 669-676. DOI: 10.1109/Jstars.2011.2108269  0.388
2010 Goodman JA, Kaeli D, Schaa D, Yilmazer A. Accelerating a hyperspectral inversion model for submerged marine ecosystems using high performance computing on graphical processor units Proceedings of Spie - the International Society For Optical Engineering. 7695. DOI: 10.1117/12.850197  0.671
2009 Tahoori MB, Asadi H, Mullins B, Kaeli DR. Obtaining FPGA soft error rate in high performance information systems Microelectronics Reliability. 49: 551-557. DOI: 10.1016/J.Microrel.2009.03.004  0.389
2008 Kaeli DR, Leeser M. Special issue: General-purpose processing using graphics processing units Journal of Parallel and Distributed Computing. 68: 1305-1306. DOI: 10.1016/J.Jpdc.2008.07.002  0.332
2007 Azmandian F, Kaeli D, Dy JG, Hutchinson E, Ancukiewicz M, Niemierko A, Jiang SB. Towards the development of an error checker for radiotherapy treatment plans: a preliminary study. Physics in Medicine and Biology. 52: 6511-24. PMID 17951859 DOI: 10.1088/0031-9155/52/21/012  0.744
2007 Ye D, Ray J, Kaeli D. Characterization of file I/O activity for SPEC CPU2006 Acm Sigarch Computer Architecture News. 35: 112-117. DOI: 10.1145/1241601.1241622  0.339
2007 Asadi H, Tahoori MB, Mullins B, Kaeli D, Granlund K. Soft error susceptibility analysis of SRAM-based FPGAs in high-performance information systems Ieee Transactions On Nuclear Science. 54: 2714-2726. DOI: 10.1109/Tns.2007.910426  0.385
2006 Sridharan V, Asadi H, Tahoori MB, Kaeli D. Reducing data cache susceptibility to soft errors Ieee Transactions On Dependable and Secure Computing. 3: 353-364. DOI: 10.1109/Tdsc.2006.55  0.728
2006 Petit S, Sahuquillo J, Pont A, Kaeli D. Addressing a workload characterization study to the design of consistency protocols The Journal of Supercomputing. 38: 49-72. DOI: 10.1007/S11227-006-7866-4  0.418
2005 Moffie M, Kaeli D. ASM: application security monitor Acm Sigarch Computer Architecture News. 33: 21-26. DOI: 10.1145/1127577.1127583  0.743
2005 Uluski D, Moffie M, Kaeli D. Characterizing antivirus workload execution Acm Sigarch Computer Architecture News. 33: 90-98. DOI: 10.1145/1055626.1055639  0.735
2005 Ye D, Kaeli D. A reliable return address stack: microarchitectural features to defeat stack smashing Acm Sigarch Computer Architecture News. 33: 73-80. DOI: 10.1145/1055626.1055637  0.395
2003 Morano D, Khalafi A, Kaeli DR, Uht AK. Realizing high IPC through a scalable memory-latency tolerant multipath microarchitecture Acm Sigarch Computer Architecture News. 31: 16-25. DOI: 10.1145/773365.773368  0.359
2001 Hadimioglu H, Kaeli D, Lombardi F. Introduction to the special section on high performance memory systems Ieee Transactions On Computers. 50: 1103-1104. DOI: 10.1109/Tc.2001.966487  0.331
2000 Aydin H, Kaeli D. Using cache line coloring to perform aggressive procedure inlining Acm Sigarch Computer Architecture News. 28: 62-71. DOI: 10.1145/346023.346046  0.378
1999 Liu Y, Dimitri M, Kaeli DR. Branch-directed and pointer-based data cache prefetching Journal of Systems Architecture. 45: 1047-1073. DOI: 10.1016/S1383-7621(98)00050-2  0.386
1997 Kaeli DR, Fong LL, Booth RC, Imming KC, Weigel JP. Performance analysis on a CC-NUMA prototype Ibm Journal of Research and Development. 41: 205-214. DOI: 10.1147/Rd.413.0205  0.402
1996 Belayneh S, Kaeli DR. A discussion on non-blocking/lockup-free caches Acm Sigarch Computer Architecture News. 24: 18-25. DOI: 10.1145/235688.235691  0.367
1992 Miljanic Z, Kaeli DR. A study of 80x86/80x87 floating-point execution Acm Sigsmall\/Pc Notes. 18: 13-17. DOI: 10.1145/152428.152430  0.322
Show low-probability matches.