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Jianchao Lu - Publications

Affiliations: 
LinkedIn 
 Synopsys 
 2011 Electrical and Computer Engineering Drexel University, Philadelphia, PA, United States 
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3 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2012 Lu J, Teng Y, Taskin B. A reconfigurable clock polarity assignment flow for clock gated designs Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 1002-1011. DOI: 10.1109/Tvlsi.2011.2147339  0.525
2012 Lu J, Mao X, Taskin B. Integrated clock mesh synthesis with incremental register placement Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 31: 217-227. DOI: 10.1109/Tcad.2011.2173491  0.491
2011 Lu J, Taskin B. Clock buffer polarity assignment with skew tuning Acm Transactions On Design Automation of Electronic Systems. 16. DOI: 10.1145/2003695.2003709  0.54
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