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Satyanarayan S. Iyer, Ph.D. - Publications

Affiliations: 
2008 Systems Science State University of New York at Binghamton, Vestal, NY, United States 
Area:
Mechanical Engineering
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6 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2012 Iyer SS. The evolution of dense embedded memory in high performance logic technologies Technical Digest - International Electron Devices Meeting, Iedm. DOI: 10.1109/IEDM.2012.6479155  0.315
2010 Iyer S, Srihari K. Assembly reliability assessment and life estimation for a stacked area array device Microelectronics Reliability. 50: 978-985. DOI: 10.1016/J.Microrel.2010.03.018  0.557
2009 Iyer S, Srihari K. Reliable lead-free rework process for stacked CSP components Ieee Transactions On Electronics Packaging Manufacturing. 32: 214-220. DOI: 10.1109/Tepm.2009.2022541  0.573
2008 Iyer S, Sajjala S, Damodaran P, Srihari K. Implementing 0201s on high-density lead-free memory modules Ieee Transactions On Electronics Packaging Manufacturing. 31: 41-50. DOI: 10.1109/Tepm.2007.914211  0.565
2007 Manjunath D, Iyer S, Damodaran P, Srihari K. Developing a repeatable and reliable rework process for lead-free fine-pitch BGAs Ieee Transactions On Electronics Packaging Manufacturing. 30: 270-278. DOI: 10.1109/Tepm.2007.906502  0.384
2006 Manjunath D, Iyer S, Eckel S, Damodaran P, Srihari K. Minimizing flux spatter during lead-free reflow assembly Soldering and Surface Mount Technology. 18: 19-23. DOI: 10.1108/09540910610685402  0.545
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