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Geunho Cho, Ph.D. - Publications

Affiliations: 
2012 Electrical and Computer Engineering Northeastern University, Boston, MA, United States 
Area:
Electronics and Electrical Engineering
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4 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2016 Cho G, Lombardi F. Design and process variation analysis of CNTFET-based ternary memory cells Integration, the Vlsi Journal. 54: 97-108. DOI: 10.1016/J.Vlsi.2016.02.003  0.469
2014 Cho G, Lombardi F. Circuit-Level Simulation of a CNTFET With Unevenly Positioned CNTs by Linear Programming Ieee Transactions On Device and Materials Reliability. 14: 234-244. DOI: 10.1109/Tdmr.2013.2279154  0.501
2013 Cho G, Lombardi F. On the Delay of a CNTFET with Undeposited CNTs by Gate Width Adjustment Journal of Electronic Testing. 29: 261-273. DOI: 10.1007/S10836-013-5388-6  0.496
2011 Cho G, Kim Y, Lombardi F. Modeling Undeposited CNTs for CNTFET Operation Ieee Transactions On Device and Materials Reliability. 11: 263-272. DOI: 10.1109/Tdmr.2011.2123896  0.495
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