Mark Horowitz
Affiliations: | Stanford University, Palo Alto, CA |
Area:
Electrical Engineering, Computer scienceGoogle:
"Mark Horowitz"Mean distance: 3886.04
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Publications
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Lim BC, Horowitz M. (2019) An Analog Model Template Library: Simplifying Chip-Level, Mixed-Signal Design Verification Ieee Transactions On Very Large Scale Integration Systems. 27: 193-204 |
Pu J, Bell S, Yang X, et al. (2017) Programming Heterogeneous Systems from an Image Processing DSL Acm Transactions On Architecture and Code Optimization. 14: 26 |
Pedram A, Richardson S, Horowitz M, et al. (2017) Dark Memory and Accelerator-Rich System Optimization in the Dark Silicon Era Ieee Design & Test. 34: 39-50 |
Lim BC, Horowitz M. (2016) Error Control and Limit Cycle Elimination in Event-Driven Piecewise Linear Analog Functional Models Ieee Transactions On Circuits and Systems. 63: 23-33 |
Qadeer W, Hameed R, Shacham O, et al. (2015) Convolution engine: Balancing efficiency and flexibility in specialized computing Communications of the Acm. 58: 85-93 |
Richardson S, Marković D, Danowitz A, et al. (2015) Building Conflict-Free FFT Schedules Ieee Transactions On Circuits and Systems I: Regular Papers. 62: 1146-1155 |
Lim BC, Jang J, Mao J, et al. (2015) Digital Analog Design: Enabling Mixed-Signal System Validation Ieee Design & Test of Computers. 32: 44-52 |
Liao S, Horowitz M. (2014) A Verilog Piecewise-Linear Analog Behavior Model for Mixed-Signal Validation Ieee Transactions On Circuits and Systems. 61: 2229-2235 |
Adams A, Jacobs DE, Dolson J, et al. (2012) The Frankencamera: An experimental platform for computational photography Communications of the Acm. 55: 90-98 |
Wachs M, Shacham O, Asgar Z, et al. (2012) Bringing up a chip on the cheap Ieee Design and Test of Computers. 29: 57-65 |