Joshua J. Yi, Ph.D.

2003 University of Minnesota, Twin Cities, Minneapolis, MN 
Electronics and Electrical Engineering
"Joshua Yi"


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David J. Lilja grad student 2003 UMN
 (Improving processor performance and simulation methodology.)
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Arvind, August D, Pingali K, et al. (2010) Programming multicores: Do applications programmers need to write explicitly parallel programs? Ieee Micro. 30: 19-32
Sendag R, Yi JJ, Chuang PF, et al. (2008) Low power/area branch prediction using complementary branch predictors Ipdps Miami 2008 - Proceedings of the 22nd Ieee International Parallel and Distributed Processing Symposium, Program and Cd-Rom
Yi JJ, Sendag R, Lilja DJ, et al. (2007) Speed versus accuracy trade-offs in microarchitectural simulations Ieee Transactions On Computers. 56: 1549-1563
Gueron S, Seifert JP, Strongin G, et al. (2007) Where does security stand? New vulnerabilities vs. trusted computing Ieee Micro. 27: 25-35
González A, Mahlke S, Mukherjee S, et al. (2007) Reliability: Fallacy or reality? Ieee Micro. 27: 36-45
Skadron K, Bose P, Ghose K, et al. (2007) Low-power design and temperature management Ieee Micro. 27: 46-57
Sendag R, Yi JJ, Chuang PF. (2007) Branch misprediction prediction: Complementary branch predictors Ieee Computer Architecture Letters. 6
Sendag R, Yilmazer A, Yi JJ, et al. (2007) The impact of wrong-path memory references in cache-coherent multiprocessor systems Journal of Parallel and Distributed Computing. 67: 1256-1269
Yi JJ, Vandierendonck H, Eeckhout L, et al. (2006) The exigency of benchmark and compiler drift: Designing tomorrow's processors with yesterday's tools Proceedings of the International Conference On Supercomputing. 75-86
Yi JJ, Lilja DJ. (2006) Simulation of computer architectures: Simulators, benchmarks, methodologies, and recommendations Ieee Transactions On Computers. 55: 268-280
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