Muhammad M. Bashir, Ph.D.
Affiliations: | 2011 | Georgia Institute of Technology, Atlanta, GA |
Area:
Electronics and Electrical Engineering, Computer Engineering, StatisticsGoogle:
"Muhammad Bashir"Parents
Sign in to add mentor| Linda Milor | grad student | 2011 | Georgia Tech | |
| (Modeling reliability in copper/low-k interconnects and variability in CMOS.) | ||||
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Publications
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| Bashir MM, Milor L. (2015) Impact of linewidth on backend dielectric TDDB and incorporation of the linewidth effect in full chip lifetime analysis Ieee Transactions On Semiconductor Manufacturing. 28: 25-34 |
| Bashir MM, Chen CC, Milor L, et al. (2014) Backend dielectric reliability full chip simulator Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 22: 1750-1762 |
| Chen C, Bashir M, Milor LS, et al. (2014) Simulation of system backend dielectric reliability Microelectronics Journal. 45: 1327-1334 |
| Bashir MM, Milor L. (2011) Determining the impact of within-die variation on circuit timing Ieee Transactions On Semiconductor Manufacturing. 24: 385-391 |
| Bashir M, Milor L, Kim DH, et al. (2011) Impact of irregular geometries on low-k dielectric breakdown Microelectronics Reliability. 51: 1582-1586 |
| Bashir MM, Milor L. (2010) Analysis of the impact of linewidth variation on low-k dielectric breakdown Ieee International Reliability Physics Symposium Proceedings. 895-902 |
| Bashir M, Milor LS, Kim DH, et al. (2010) Methodology to determine the impact of linewidth variation on chip scale copper/low-k backend dielectric breakdown Microelectronics Reliability. 50: 1341-1346 |
| Bashir M, Milor LS. (2009) A methodology to extract failure rates for low-k dielectric breakdown with multiple geometries and in the presence of die-to-die linewidth variation. Microelectronics Reliability. 49: 1096-1102 |