Year |
Citation |
Score |
2015 |
Emmart N, Chen Y, Weems CC. Computing the Smallest Eigenvalue of Large Ill-Conditioned Hankel Matrices Communications in Computational Physics. 18: 104-124. DOI: 10.4208/Cicp.260514.231214A |
0.395 |
|
2015 |
Lee DH, Yoon SK, Kim JG, Weems CC, Kim SD. A new memory-disk integrated system with HW optimizer Acm Transactions On Architecture and Code Optimization. 12. DOI: 10.1145/2738053 |
0.369 |
|
2014 |
Weems CC, Kerbyson DJ, Rajamony R. Guest editors' note: Special issue on large-scale parallel processing Parallel Processing Letters. 24. DOI: 10.1142/S0129626414020034 |
0.375 |
|
2014 |
Wang W, Huang X, Emmart N, Weems CC. VLSI Design of a Large-Number Multiplier for Fully Homomorphic Encryption Ieee Transactions On Very Large Scale Integration Systems. 22: 1879-1887. DOI: 10.1109/Tvlsi.2013.2281786 |
0.432 |
|
2013 |
Emmart N, Weems CC. Search-Based Automatic Code Generation For Multiprecision Modular Exponentiation On Multiple Generations Of Gpu Parallel Processing Letters. 23: 1340009. DOI: 10.1142/S0129626413400094 |
0.463 |
|
2013 |
Choi IS, Jang SI, Oh CH, Weems CC, Kim SD. A dynamic adaptive converter and management for PRAM-based main memory Microprocessors and Microsystems. 37: 554-561. DOI: 10.1016/J.Micpro.2013.06.006 |
0.348 |
|
2012 |
Park SH, Park JW, Kim SD, Weems CC. A pattern adaptive NAND flash memory storage structure Ieee Transactions On Computers. 61: 134-138. DOI: 10.1109/Tc.2010.212 |
0.391 |
|
2011 |
Emmart N, Weems CC. High precision integer multiplication with a GPU using Strassen's algorithm with multiple FFT sizes Parallel Processing Letters. 21: 359-375. DOI: 10.1142/S0129626411000266 |
0.384 |
|
2011 |
Weems CC, Kerbyson DJ, Rajamony R. Guest Editor's note: Large-scale parallel processing Parallel Processing Letters. 21: 275-277. DOI: 10.1142/S0129626410000247 |
0.302 |
|
2011 |
Park JW, Park SH, Weems CC, Kim SD. A hybrid flash translation layer design for SLC-MLC flash memory based multibank solid state disk Microprocessors and Microsystems. 35: 48-59. DOI: 10.1016/J.Micpro.2010.08.001 |
0.383 |
|
2010 |
Emmart N, Weems CC. High Precision Integer Addition, Subtraction And Multiplication With A Graphics Processing Unit Parallel Processing Letters. 20: 293-306. DOI: 10.1142/S0129626410000259 |
0.446 |
|
2010 |
Park JW, Yang HM, Park GH, Kim SD, Weems CC. An instruction-systolic programmable shader architecture for multi-threaded 3D graphics processing Journal of Parallel and Distributed Computing. 70: 1110-1118. DOI: 10.1016/J.Jpdc.2010.07.002 |
0.48 |
|
2009 |
Park JW, Park GH, Weems C, Kim SD. Sub-grouped superblock management for high-performance flash storages Ieice Electronics Express. 6: 297-303. DOI: 10.1587/Elex.6.297 |
0.324 |
|
2009 |
Hong CP, Lee EH, Weems CC, Kim SD. A profile-based multimedia sharing scheme with virtual community, based on personal space in a ubiquitous computing environment Ieee Transactions On Multimedia. 11: 1353-1361. DOI: 10.1109/Tmm.2009.2030616 |
0.321 |
|
2008 |
Walters EK, Moss JEB, Palmer T, Richards T, Weems CC. CASL: A rapid-prototyping language for modern micro-architectures Computer Languages, Systems and Structures. 34: 195-211. DOI: 10.1016/J.Cl.2007.06.001 |
0.659 |
|
2007 |
Walters EK, Moss JEB, Palmer T, Richards T, Weems CC. Modeling modern Micro-architectures using CASL Proceedings - 21st International Parallel and Distributed Processing Symposium, Ipdps 2007; Abstracts and Cd-Rom. DOI: 10.1109/IPDPS.2007.370526 |
0.421 |
|
2005 |
Moss JEB, Palmer T, Richards T, Walters EK, Weems CC. CISL: A class-based machine description language for co-generation of ompilers and simulators International Journal of Parallel Programming. 33: 231-246. DOI: 10.1007/s10766-005-3587-1 |
0.305 |
|
2004 |
Moss JEB, Palmer T, Richards T, Walters EK, Weems CC. CMDL: A class-based machine description language for co-generation of compilers and simulators Proceedings - International Parallel and Distributed Processing Symposium, Ipdps 2004 (Abstracts and Cd-Rom). 18: 2831-2838. DOI: 10.1007/S10766-005-3587-1 |
0.655 |
|
2003 |
Lee JH, Jeong SW, Kim SD, Weems CC. An intelligent cache system with hardware prefetching for high performance Ieee Transactions On Computers. 52: 607-616. DOI: 10.1109/Tc.2003.1197127 |
0.368 |
|
2003 |
Thoennes MS, Weems CC. Exploration of the performance of a data mining application via hardware based monitoring Journal of Supercomputing. 26: 25-42. DOI: 10.1023/A:1024411917202 |
0.435 |
|
2003 |
Wang Z, Burger D, McKinley KS, Reinhardt SK, Weems CC. Guided region prefetching: A cooperative hardware/software approach Conference Proceedings - Annual International Symposium On Computer Architecture, Isca. 388-398. |
0.361 |
|
2002 |
Lee J, Kim S, Weems C. Application-adaptive intelligent cache memory system Acm Transactions in Embedded Computing Systems. 1: 56-78. DOI: 10.1145/581888.581893 |
0.443 |
|
2002 |
Choi J, Lee J, Jeong S, Kim S, Weems C. A Low Power TLB Structure for Embedded Systems Ieee Computer Architecture Letters. 1: 3-3. DOI: 10.1109/L-Ca.2002.1 |
0.319 |
|
2002 |
Lee J, Jeong S, Kim S, Weems C. A banked-promotion translation lookaside buffer system Journal of Systems Architecture. 47: 1065-1078. DOI: 10.1016/S1383-7621(02)00057-7 |
0.329 |
|
2002 |
Lee J, Kim S, Weems CC. Performance analysis of a selectively compressed memory system Microprocessors and Microsystems. 26: 63-76. DOI: 10.1016/S0141-9331(01)00147-8 |
0.338 |
|
2001 |
Weems CC. Special issue: International Parallel and Distributed Processing Symposium 2000 Journal of Parallel and Distributed Computing. 61: 1707-1708. DOI: 10.1006/Jpdc.2001.1785 |
0.311 |
|
1999 |
Burleson W, Ko J, Niehaus D, Ramamritham K, Stankovic JA, Wallace G, Weems C. The spring scheduling coprocessor: A scheduling accelerator Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 7: 38-47. DOI: 10.1109/92.748199 |
0.446 |
|
1999 |
Obrenić B, Herbordt MC, Rosenberg AL, Weems CC. Using emulations to enhance the performance of parallel architectures Ieee Transactions On Parallel and Distributed Systems. 10: 1067-1081. DOI: 10.1109/71.808155 |
0.419 |
|
1996 |
Weaver GE, Weems CC, McKinley KS. Compiling high-level languages for configurable computers: applying lessons from heterogeneous processing Proceedings of Spie. 2914: 249-258. DOI: 10.1117/12.255822 |
0.485 |
|
1996 |
Weems CC. Real-time considerations in the design of the Image Understanding Architecture Real-Time Imaging. 2: 341-350. DOI: 10.1006/Rtim.1996.0035 |
0.423 |
|
1996 |
McKinley KS, Singhai SK, Weaver GE, Weems CC. Compiler architectures for heterogeneous systems Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 1033: 435-449. |
0.348 |
|
1995 |
HERBORDT MC, WEEMS CC. ENPASSANT: AN ENVIRONMENT FOR EVALUATING MASSIVELY PARALLEL ARRAY ARCHITECTURES FOR SPATIALLY MAPPED APPLICATIONS International Journal of Pattern Recognition and Artificial Intelligence. 9: 175-200. DOI: 10.1142/S0218001495000109 |
0.456 |
|
1994 |
Krikelis A, Weems CC. Associative Processing and Processors Computer. 27: 12-17. DOI: 10.1109/2.330035 |
0.37 |
|
1994 |
Herbordt MC, Corbett JC, Weems CC. Practical Algorithms for Online Routing on Fixed and Reconfigurable Meshes Journal of Parallel and Distributed Computing. 20: 341-356. DOI: 10.1006/Jpdc.1994.1032 |
0.322 |
|
1993 |
Wah BW, Aloimonos J, Bajcsy RK, Ballard D, DeGroot D, DeJong K, Dyer CR, Fahlman SE, Grishman R, Hirschman L, Korf RE, Levinson SE, Miranker DP, Morgan NH, Nirenburg S, ... ... Weems C, et al. Report on Workshop on High Performance Computing and Communications for Grand Challenge Applications: Computer Vision, Speech and Natural Language Processing, and Artificial Intelligence Ieee Transactions On Knowledge and Data Engineering. 5: 138-154. DOI: 10.1109/69.204098 |
0.464 |
|
1992 |
Weems CC, Riseman EM, Hanson AR. Image Understanding Architecture: Exploiting Potential Parallelism in Machine Vision Computer. 25: 65-68. DOI: 10.1109/2.121476 |
0.415 |
|
1991 |
Weems CC, Brown C, Webb JA, Poggio T, Kender JR. Parallel Processing in the DARPA Strategic Computing Vision Program Ieee Expert-Intelligent Systems and Their Applications. 6: 23-38. DOI: 10.1109/64.97789 |
0.431 |
|
1991 |
Weems CC. Architectural Requirements of Image Understanding with Respect to Parallel Processing Proceedings of the Ieee. 79: 537-547. DOI: 10.1109/5.92046 |
0.371 |
|
1991 |
Weems C, Riseman E, Hanson A, Rosenfeld A. The DARPA image understanding benchmark for parallel computers Journal of Parallel and Distributed Computing. 11: 1-24. DOI: 10.1016/0743-7315(91)90067-J |
0.439 |
|
1991 |
Shu DB, Nash JG, Weems CC. A multiple-level heterogeneous architecture for image understanding . 615-627. |
0.33 |
|
1989 |
Weems CC, Levitan SP, Hanson AR, Riseman EM, Shu DB, Nash JG. The image understanding architecture International Journal of Computer Vision. 2: 251-282. DOI: 10.1007/Bf00158166 |
0.623 |
|
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