Year |
Citation |
Score |
2020 |
Han K, Kahng AB, Li J. Optimal Generalized H-Tree Topology and Buffering for High-Performance and Low-Power Clock Distribution Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 39: 478-491. DOI: 10.1109/Tcad.2018.2889756 |
0.367 |
|
2020 |
Fogaça M, Kahng AB, Monteiro E, Reis R, Wang L, Woo M. On the superiority of modularity-based clustering for determining placement-relevant clusters Integration. 74: 32-44. DOI: 10.1016/J.Vlsi.2020.03.007 |
0.36 |
|
2019 |
Han C, Kahng AB, Wang L, Xu B. Enhanced Optimal Multi-Row Detailed Placement for Neighbor Diffusion Effect Mitigation in Sub-10 nm VLSI Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 1703-1716. DOI: 10.1109/Tcad.2018.2859266 |
0.35 |
|
2019 |
Cheng C, Kahng AB, Kang I, Wang L. RePlAce: Advancing Solution Quality and Routability Validation in Global Placement Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 1717-1730. DOI: 10.1109/Tcad.2018.2859220 |
0.359 |
|
2019 |
Fatemi H, Kahng AB, Lee H, Li J, Pineda de Gyvez J. Enhancing sensitivity-based power reduction for an industry IC design context Integration. 66: 96-111. DOI: 10.1016/J.Vlsi.2019.01.008 |
0.413 |
|
2018 |
Kahng A, Kahng AB, Lee H, Li J. PROBE: A Placement, Routing, Back-End-of-Line Measurement Utility Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 1459-1472. DOI: 10.1109/Tcad.2017.2750072 |
0.402 |
|
2018 |
Dobre SA, Kahng AB, Li J. Design Implementation With Noninteger Multiple-Height Cells for Improved Design Quality in Advanced Nodes Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 855-868. DOI: 10.1109/Tcad.2017.2731679 |
0.384 |
|
2017 |
Agrawal P, Broxterman M, Chatterjee B, Cuevas P, Hayashi KH, Kahng AB, Myana PK, Nath S. Optimal Scheduling and Allocation for IC Design Management and Cost Reduction Acm Transactions On Design Automation of Electronic Systems. 22: 1-30. DOI: 10.1145/3035483 |
0.367 |
|
2017 |
Alaghi A, Chan WJ, Hayes JP, Kahng AB, Li J. Trading Accuracy for Energy in Stochastic Circuit Design Acm Journal On Emerging Technologies in Computing Systems. 13: 1-30. DOI: 10.1145/2990503 |
0.341 |
|
2017 |
Firouzi F, Farahani B, Kahng AB, Rabaey JM, Balac N. Guest Editorial: Alternative Computing and Machine Learning for Internet of Things Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 25: 2685-2687. DOI: 10.1109/Tvlsi.2017.2742098 |
0.31 |
|
2017 |
Blutman K, Fatemi H, Kapoor A, Kahng AB, Li J, Pineda de Gyvez J. Logic Design Partitioning for Stacked Power Domains Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 25: 3045-3056. DOI: 10.1109/Tvlsi.2017.2729587 |
0.34 |
|
2017 |
Debacker P, Han K, Kahng AB, Lee H, Raghavan P, Wang L. MILP-Based Optimization of 2-D Block Masks for Timing-Aware Dummy Segment Removal in Self-Aligned Multiple Patterning Layouts Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 36: 1075-1088. DOI: 10.1109/Tcad.2017.2685594 |
0.385 |
|
2017 |
Chan T, Gupta P, Han K, Kagalwalla AA, Kahng AB. Benchmarking of Mask Fracturing Heuristics Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 36: 170-183. DOI: 10.1109/Tcad.2016.2620902 |
0.764 |
|
2017 |
Chan WJ, Kahng AB, Li J. Revisiting 3DIC benefit with multiple tiers Integration. 58: 226-235. DOI: 10.1016/J.Vlsi.2017.01.004 |
0.34 |
|
2016 |
Kahng AB, Luo M, Nam GJ, Nath S, Pan DZ, Robins G. Toward metrics of design automation research impact 2015 Ieee/Acm International Conference On Computer-Aided Design, Iccad 2015. 263-270. DOI: 10.1109/ICCAD.2015.7372579 |
0.518 |
|
2015 |
Kahng AB, Kang S, Li J, Pineda De Gyvez J. An Improved Methodology for Resilient Design Implementation Acm Transactions On Design Automation of Electronic Systems. 20: 1-26. DOI: 10.1145/2749462 |
0.425 |
|
2015 |
De VK, Kahng AB, Karnik T, Liu B, Maleki M, Wang L. Application-Specific Cross-Layer Optimization Based on Predictive Variable-Latency VLSI Design Acm Journal On Emerging Technologies in Computing Systems. 12: 1-19. DOI: 10.1145/2746341 |
0.382 |
|
2015 |
Chan T, Kahng AB, Li J, Nath S, Park B. Optimization of Overdrive Signoff in High-Performance and Low-Power ICs Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 1552-1556. DOI: 10.1109/Tvlsi.2014.2339848 |
0.316 |
|
2015 |
Kahng AB, Lin B, Nath S. ORION3.0: A comprehensive noc router estimation tool Ieee Embedded Systems Letters. 7: 41-45. DOI: 10.1109/Les.2015.2402197 |
0.321 |
|
2015 |
Chan TB, Gupta P, Han K, Kagalwalla AA, Kahng AB, Sahouria E. Benchmarking of mask fracturing heuristics Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 2015: 246-253. DOI: 10.1109/ICCAD.2014.7001359 |
0.722 |
|
2014 |
Kahng AB, Kang S, Li J. A new methodology for reduced cost of resilience Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 157-162. DOI: 10.1145/2591513.2591600 |
0.314 |
|
2014 |
Kahng AB. Lithography-induced limits to scaling of design quality Proceedings of Spie - the International Society For Optical Engineering. 9053. DOI: 10.1117/12.2047391 |
0.407 |
|
2014 |
Jouppi NP, Kahng AB, Muralimanohar N, Srinivas V. CACTI-IO: CACTI With OFF-chip Power-Area-Timing Models Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. DOI: 10.1109/Tvlsi.2014.2334635 |
0.317 |
|
2014 |
Chan T, Gupta P, Kahng AB, Lai L. Synthesis and Analysis of Design-Dependent Ring Oscillator (DDRO) Performance Monitors Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 22: 2117-2130. DOI: 10.1109/Tvlsi.2013.2282742 |
0.485 |
|
2014 |
Chan T, Chan WJ, Kahng AB. On Aging-Aware Signoff for Circuits With Adaptive Voltage Scaling Ieee Transactions On Circuits and Systems I: Regular Papers. 61: 2920-2930. DOI: 10.1109/Tcsi.2014.2321204 |
0.324 |
|
2013 |
Chan TB, Kahng AB. Post-routing back-end-of-line layout optimization for improved time-dependent dielectric breakdown reliability Proceedings of Spie - the International Society For Optical Engineering. 8684. DOI: 10.1117/12.2011645 |
0.363 |
|
2013 |
Kahng AB, Kang S, Kumar R, Sartori J. Enhancing the efficiency of energy-constrained DVFS designs Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 21: 1769-1782. DOI: 10.1109/Tvlsi.2012.2219084 |
0.354 |
|
2013 |
Kahng AB, Kang S, Lee H, Markov IL, Thapar P. High-performance gate sizing with a signoff timer Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 450-457. DOI: 10.1109/ICCAD.2013.6691156 |
0.551 |
|
2012 |
Kahng AB, Li B, Peh LS, Samadi K. Orion 2.0: A power-area simulator for interconnection networks Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 191-196. DOI: 10.1109/Tvlsi.2010.2091686 |
0.301 |
|
2012 |
Kahng AB, Kang S, Kumar R, Sartori J. Recovery-driven design: Exploiting error resilience in design of energy-efficient processors Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 31: 404-417. DOI: 10.1109/Tcad.2011.2172610 |
0.341 |
|
2011 |
Jeong K, Kahng AB, Progler CJ. Cost-driven mask strategies considering parametric yield, defectivity, and production volume Journal of Micro/Nanolithography, Mems, and Moems. 10. DOI: 10.1117/1.3633246 |
0.325 |
|
2011 |
Kahng AB. The future of signoff Ieee Design and Test of Computers. 28: 86-89. DOI: 10.1109/Mdt.2011.66 |
0.332 |
|
2011 |
Kahng AB. Design for manufacturability: Then and now Ieee Design and Test of Computers. 28: 76-77. DOI: 10.1109/Mdt.2011.12 |
0.371 |
|
2010 |
Carloni LP, Kahng AB, Muddu SV, Pinto A, Samadi K, Sharma P. Accurate predictive interconnect modeling for system-level design Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 18: 679-684. DOI: 10.1109/Tvlsi.2009.2014772 |
0.376 |
|
2010 |
Gupta M, Jeong K, Kahng AB. Timing Yield-Aware Color Reassignment and Detailed Placement Perturbation for Bimodal CD Distribution in Double Patterning Lithography Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 29: 1229-1242. DOI: 10.1109/Tcad.2010.2049041 |
0.384 |
|
2010 |
Jeong K, Kahng AB, Park C, Yao H. Dose Map and Placement Co-Optimization for Improved Timing Yield and Leakage Power Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 29: 1070-1082. DOI: 10.1109/Tcad.2010.2048397 |
0.356 |
|
2010 |
Kahng AB, Park C, Xu X, Yao H. Layout Decomposition Approaches for Double Patterning Lithography Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 29: 939-952. DOI: 10.1109/Tcad.2010.2048374 |
0.344 |
|
2010 |
Jeong K, Kahng AB, Lin B, Samadi K. Accurate Machine-Learning-Based On-Chip Router Modeling Ieee Embedded Systems Letters. 2: 62-66. DOI: 10.1109/Les.2010.2051413 |
0.334 |
|
2009 |
Kahng AB, Park C, Sharma P, Wang Q. Lens aberration aware placement for timing yield Acm Transactions On Design Automation of Electronic Systems. 14: 1-26. DOI: 10.1145/1455229.1455245 |
0.359 |
|
2009 |
Greenway RT, Hendel R, Jeong K, Kahng AB, Petersen JS, Rao Z, Smayling MC. Interference assisted lithography for patterning of 1D gridded design Proceedings of Spie - the International Society For Optical Engineering. 7271. DOI: 10.1117/12.812033 |
0.311 |
|
2009 |
Jeong K, Kahng AB, Samadi K. Impact of guardband reduction on design outcomes: A quantitative approach Ieee Transactions On Semiconductor Manufacturing. 22: 552-565. DOI: 10.1109/Tsm.2009.2031789 |
0.399 |
|
2008 |
Gupta P, Kahng AB, Kim Y, Shah S, Sylvester D. Shaping Gate Channels for Improved Devices Proceedings of Spie. 6925. DOI: 10.1117/12.772889 |
0.521 |
|
2008 |
Kahng AB, Muddu S, Park CH. Auxiliary pattern-based optical proximity correction for better printability, timing, and leakage control Journal of Micro/Nanolithography, Mems, and Moems. 7. DOI: 10.1117/1.2898504 |
0.347 |
|
2008 |
Kahng AB, Topaloglu RO. DOE-based extraction of CMP, active and via fill impact on capacitances Ieee Transactions On Semiconductor Manufacturing. 21: 22-32. DOI: 10.1109/Tsm.2007.913188 |
0.358 |
|
2008 |
Kahng AB, Park C, Xu X. Fast Dual-Graph-Based Hotspot Filtering Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 1635-1642. DOI: 10.1109/Tcad.2008.927765 |
0.38 |
|
2008 |
Kahng AB, Sharma P, Topaloglu RO. Chip Optimization Through STI-Stress-Aware Placement Perturbations and Fill Insertion Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 1241-1252. DOI: 10.1109/Tcad.2008.923083 |
0.357 |
|
2008 |
Kahng AB, Samadi K. CMP fill synthesis: A survey of recent studies Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 3-19. DOI: 10.1109/Tcad.2007.907061 |
0.39 |
|
2007 |
Kahng AB. Performance-driven optical proximity correction for mask cost reduction Journal of Micro/Nanolithography, Mems, and Moems. 6: 031005. DOI: 10.1117/1.2774994 |
0.388 |
|
2007 |
Gupta P, Kahng AB, Chul-Hong P. Detailed Placement for Enhanced Control of Resist and Etch CDs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 2144-2157. DOI: 10.1109/Tcad.2007.906998 |
0.509 |
|
2007 |
Kahng AB, Liu B, Xu X. Statistical timing analysis in the presence of signal-integrity effects Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 1873-1877. DOI: 10.1109/Tcad.2007.895771 |
0.318 |
|
2007 |
Gupta P, Kahng AB, Kim Y, Sylvester D. Self-Compensating Design for Reduction of Timing and Leakage Sensitivity to Systematic Pattern-Dependent Variation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 1614-1624. DOI: 10.1109/Tcad.2007.895759 |
0.557 |
|
2007 |
He L, Kahng AB, Tam KH, Xiong J. Simultaneous Buffer Insertion and Wire Sizing Considering Systematic CMP Variation and Random $L_{\rm eff}$ Variation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 845-857. DOI: 10.1109/Tcad.2006.884869 |
0.396 |
|
2007 |
Kahng AB, Mǎndoiu II, Xu X, Zelikovsky AZ. Enhanced design flow and optimizations for multiproject wafers Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 301-310. DOI: 10.1109/Tcad.2006.883922 |
0.432 |
|
2007 |
Chiang C, Kahng AB, Sinha S, Xu X, Zelikovsky AZ. Fast and efficient bright-field AAPSM conflict detection and correction Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 115-126. DOI: 10.1109/Tcad.2006.882642 |
0.333 |
|
2007 |
Kahng A, Chayut I, Cohn J, Hattori T, Kong J, Paulin P, Tobias R. Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs Ieee Design & Test of Computers. 24: 83-93. DOI: 10.1109/Mdt.2007.24 |
0.357 |
|
2006 |
Gupta P, Kahng AB, Park C, Samadi K, Xu X. Wafer Topography-Aware Optical Proximity Correction Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 2747-2756. DOI: 10.1109/Tcad.2006.882604 |
0.535 |
|
2006 |
Kahng AB, Reda S. Zero-change netlist transformations: A new technique for placement benchmarking Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 2806-2819. DOI: 10.1109/Tcad.2006.882473 |
0.337 |
|
2006 |
Nam GJ, Reda S, Alpert CJ, Villarrubia PG, Kahng AB. A fast hierarchical quadratic placement algorithm Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 678-691. DOI: 10.1109/Tcad.2006.870079 |
0.322 |
|
2006 |
Gupta P, Kahng A, Sharma P, Sylvester D. Gate-length biasing for runtime-leakage control Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 1475-1485. DOI: 10.1109/Tcad.2005.857313 |
0.535 |
|
2006 |
Kahng AB, Mǎndoiu II, Reda S, Xu X, Zelikovsky AZ. Computer-aided optimization of DNA array design and manufacturing Design Automation Methods and Tools For Microfluidics-Based Biochips. 235-269. DOI: 10.1109/Tcad.2005.855940 |
0.329 |
|
2006 |
Kahng AB, Reda S. Wirelength minimization for min-cut placements via placement feedback Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 1301-1312. DOI: 10.1109/Tcad.2005.855917 |
0.409 |
|
2006 |
Kahng AB, Reda S. New and improved BIST diagnosis methods from combinatorial group testing theory Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 533-543. DOI: 10.1109/Tcad.2005.854635 |
0.32 |
|
2005 |
Gupta P, Kahng AB, Mantik S. Routing-aware scan chain ordering Acm Transactions On Design Automation of Electronic Systems. 10: 546-560. DOI: 10.1145/1080334.1080339 |
0.791 |
|
2005 |
Kahng AB, Muddu S, Sharma P. Defocus-aware leakage estimation and control Proceedings of the International Symposium On Low Power Electronics and Design. 263-268. DOI: 10.1109/Tcad.2007.913387 |
0.344 |
|
2005 |
Chen Y, Kahng AB, Robins G, Zelikovsky A, Zheng Y. Compressible area fill synthesis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 1169-1187. DOI: 10.1109/Tcad.2005.850859 |
0.647 |
|
2005 |
Kahng AB, Wang Q. Implementation and extensibility of an analytic placer Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 734-747. DOI: 10.1109/Tcad.2005.846366 |
0.431 |
|
2004 |
Kahng AB, Măndoiu II, Pevzner PA, Reda S, Zelikovsky AZ. Scalable heuristics for design of DNA probe arrays. Journal of Computational Biology : a Journal of Computational Molecular Cell Biology. 11: 429-47. PMID 15285900 DOI: 10.1089/1066527041410391 |
0.355 |
|
2004 |
Kahng AB, Xu X. Local Unidirectional Bias for Cutsize-Delay Tradeoff in Performance-Driven Bipartitioning Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 464-471. DOI: 10.1109/Tcad.2004.825847 |
0.351 |
|
2004 |
Caldwell AE, Choi HJ, Kahng AB, Mantik S, Potkonjak M, Qu G, Wong JL. Effective iterative techniques for fingerprinting design IP Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 208-215. DOI: 10.1109/Tcad.2003.822126 |
0.804 |
|
2004 |
Kahng AB, Liu B, Mǎndoiu II. Nontree Routing for Reliability and Yield Improvement Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 148-156. DOI: 10.1109/Tcad.2003.819426 |
0.444 |
|
2004 |
Kahng AB, Markov IL, Reda S. Boosting: Min-cut placement with improved signal delay Proceedings - Design, Automation and Test in Europe Conference and Exhibition. 2: 1098-1103. DOI: 10.1109/DATE.2004.1269039 |
0.532 |
|
2004 |
Kahng AB, Reda S. Match twice and stitch: A new TSP tour construction heuristic Operations Research Letters. 32: 499-509. DOI: 10.1016/J.Orl.2004.04.001 |
0.312 |
|
2004 |
Chen Y, Kahng AB, Robins G, Zelikovsky A, Zheng Y. Evaluation of the new OASIS format for layout fill compression 11th Ieee International Conference On Electronics, Circuits and Systems, Icecs 2004. 377-382. |
0.537 |
|
2003 |
Cao Y, Hu C, Huang X, Kahng AB, Markov IL, Oliver M, Stroobandt D, Sylvester D. Improved a priori interconnect predictions and technology extrapolation in the GTX system Ieee Transactions On Very Large Scale Integration Systems. 11: 3-14. DOI: 10.1109/Tvlsi.2002.808479 |
0.556 |
|
2003 |
Caldwell AE, Kahng AB, Markov IL. Hierarchical whitespace allocation in top-down placement Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 22: 1550-1556. DOI: 10.1109/Tcad.2003.818375 |
0.626 |
|
2003 |
Albrecht C, Kahng AB, Liu B, Mǎndoiu II, Zelikovsky AZ. On the skew-bounded minimum-buffer routing tree problem Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 22: 937-945. DOI: 10.1109/Tcad.2003.814238 |
0.412 |
|
2003 |
Alpert CJ, Kahng AB, Liu B, Mǎndoiu II, Zelikovsky AZ. Minimum buffered routing with bounded capacitive load for slew rate and reliability control Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 22: 241-253. DOI: 10.1109/Tcad.2002.807888 |
0.399 |
|
2003 |
Kahng AB. How much variability can designers tolerate? Ieee Design and Test of Computers. 20: 96-97. DOI: 10.1109/Mdt.2003.1246168 |
0.368 |
|
2003 |
Kahng AB. Bringing down NRE Ieee Design and Test of Computers. 20: 110-111. DOI: 10.1109/Mdt.2003.10015 |
0.374 |
|
2003 |
Gupta P, Kahng AB, Mantik S. A proposal for routing-based timing-driven scan chain ordering Proceedings - International Symposium On Quality Electronic Design, Isqed. 2003: 339-343. DOI: 10.1109/ISQED.2003.1194755 |
0.783 |
|
2003 |
Kahng AB, Markov IL. Impact of interoperability on CAD-IP reuse: an academic viewpoint Proceedings - International Symposium On Quality Electronic Design, Isqed. 2003: 208-213. DOI: 10.1109/ISQED.2003.1194733 |
0.45 |
|
2003 |
Chen Y, Kahng AB, Robins G, Zelikovsky A, Zheng Y. Area fill generation with inherent data volume reduction Proceedings -Design, Automation and Test in Europe, Date. 868-873. DOI: 10.1109/DATE.2003.1253715 |
0.582 |
|
2003 |
Gupta P, Kahng AB, Mantik S. Routing-aware scan chain ordering Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2003: 857-862. DOI: 10.1109/ASPDAC.2003.1195137 |
0.794 |
|
2003 |
Kahng AB, Mǎndoiu II, Zelikovsky AZ. Highly scalable algorithms for rectilinear and octilinear Steiner trees Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2003: 827-833. DOI: 10.1109/ASPDAC.2003.1195132 |
0.306 |
|
2002 |
Chen Y, Kahng AB, Robins G, Zelikovsky A. Monte-Carlo methods for chemical-mechanical planarization on multiple-layer and dual-material models Proceedings of Spie - the International Society For Optical Engineering. 4692: 421-432. DOI: 10.1117/12.475677 |
0.567 |
|
2002 |
Chen Y, Kahng AB, Robins G, Zelikovsky A. Area fill synthesis for uniform layout density Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 21: 1132-1147. DOI: 10.1109/Tcad.2002.802278 |
0.626 |
|
2002 |
Caldwell AE, Markov IL, Kahng AB. Toward CAD-IP reuse: a web bookshelf of fundamental algorithms Ieee Design & Test of Computers. 19: 72-81. DOI: 10.1109/Mdt.2002.1003801 |
0.557 |
|
2002 |
Kahng AB. The Cost of Design Ieee Design & Test of Computers. 19: 136. DOI: 10.1109/Mdt.2002.10024 |
0.349 |
|
2002 |
Allan A, Edenfeld D, Joyner W, Kahng A, Rodgers M, Zorian Y. 2001 technology roadmap for semiconductors Computer. 35: 42-53. DOI: 10.1109/Mc.2004.1260725 |
0.348 |
|
2002 |
Kahng AB, Mantik S. Measurement of inherent noise in EDA tools Proceedings - International Symposium On Quality Electronic Design, Isqed. 2002: 206-211. DOI: 10.1109/ISQED.2002.996731 |
0.761 |
|
2002 |
Dragan FF, Kahng AB, Mǎndoiu II, Muddu S, Zelikovsky A. Provably good global buffering by generalized multiterminal multicommodity flow approximation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 21: 263-274. DOI: 10.1109/43.986421 |
0.395 |
|
2002 |
Kahng AB, Mantik S, Markov IL. Min-max placement for large-scale timing optimization Proceedings of the International Symposium On Physical Design. 143-148. |
0.789 |
|
2002 |
Chen Y, Kahng AB, Robins G, Zelikovsky A. Closing the smoothness and uniformity gap in area fill synthesis Proceedings of the International Symposium On Physical Design. 137-142. |
0.495 |
|
2001 |
Kahng AB, Mantik S. A system for automatic recording and prediction of design quality metrics Proceedings - International Symposium On Quality Electronic Design, Isqed. 2001: 81-86. DOI: 10.1109/ISQED.2001.915210 |
0.782 |
|
2001 |
Chen Y, Kahng AB, Robins G, Zelikovsky A. Hierarchical dummy fill for process uniformity Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2001: 139-144. DOI: 10.1109/ASPDAC.2001.913294 |
0.49 |
|
2001 |
Baldick R, Kahng AB, Kennings A, Markov IL. Efficient optimization by modifying the objective function: Applications to timing-driven VLSI layout Ieee Transactions On Circuits and Systems I: Fundamental Theory and Applications. 48: 947-956. DOI: 10.1109/81.940185 |
0.599 |
|
2001 |
Kahng AB, Lach J, Mangione-Smith WH, Mantik S, Markov IL, Potkonjak M, Tucker P, Wang H, Wolfe G. Constraint-based watermarking techniques for design IP protection Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 20: 1236-1252. DOI: 10.1109/43.952740 |
0.788 |
|
2001 |
Kahng AB, Mantik S, Stroobandt D. Toward accurate models of achievable routing Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 20: 648-659. DOI: 10.1109/43.920697 |
0.782 |
|
2000 |
Caldwell AE, Kahng AB, Markov IL. Iterative partitioning with varying node weights Vlsi Design. 11: 249-258. DOI: 10.1155/2000/15862 |
0.569 |
|
2000 |
Caldwell AE, Kahng AB, Markov IL. Improved algorithms for hypergraph bipartitioning Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 661-666. DOI: 10.1145/368434.368864 |
0.493 |
|
2000 |
Chen Y, Kahng AB, Robins G, Zelikovsky A. Monte-Carlo algorithms for layout density control Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 523-528. DOI: 10.1145/368434.368778 |
0.511 |
|
2000 |
Caldwell AE, Kahng AB, Markov IL. Design and implementation of move-based heuristics for VLSI hypergraph partitioning Acm Journal of Experimental Algorithmics. 5: 5. DOI: 10.1145/351827.384247 |
0.611 |
|
2000 |
Caldwell AE, Kahng AB, Markov IL. Optimal partitioners and endcase placers for standardcell layout Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 19: 13041313. DOI: 10.1109/43.892854 |
0.64 |
|
2000 |
Caldwell AE, Kahng AB, Markov IL. Optimal partitioners and end-case placers for standard-cell layout Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 19: 1304-1313. DOI: 10.1109/43.892854 |
0.502 |
|
2000 |
Alpert CJ, Caldwell AE, Kahng AB, Markov IL. Hypergraph partitioning with fixed vertices Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 19: 267-272. DOI: 10.1109/43.828555 |
0.61 |
|
2000 |
Berman P, Kahng AB, Vidhani D, Wang H, Zelikovsky A. Optimal phase conflict removal for layout of dark field alternating phase shifting masks Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 19: 175-187. DOI: 10.1109/43.828546 |
0.349 |
|
1999 |
Alpert CJ, Caldwell AE, Chan TF, Huang DJ, Kahng AB, Markov IL, Moroz MS. Analytical Engines are Unnecessary in Top-down Partitioning-based Placement Vlsi Design. 10: 99-116. DOI: 10.1155/1999/93607 |
0.57 |
|
1999 |
Kahng AB, Muddu S, Sarto E. Tuning Strategies for Global Interconnects in High-Performance Deep-Submicron ICs Vlsi Design. 10: 21-34. DOI: 10.1155/1999/38974 |
0.367 |
|
1999 |
Caldwell AE, Kahng AB, Mantik S, Markov IL, Zelikovsky A. On wirelength estimations for row-based placement Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 18: 1265-1278. DOI: 10.1109/43.784119 |
0.76 |
|
1999 |
Kahng AB, Robins G, Singh A, Zelikovsky A. Filling algorithms and analyses for layout density control Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 18: 445-462. DOI: 10.1109/43.752928 |
0.64 |
|
1999 |
Alpert CJ, Kahng AB, Yao SZ. Spectral partitioning with multiple eigenvectors Discrete Applied Mathematics. 90: 3-26. DOI: 10.1016/S0166-218X(98)00083-3 |
0.327 |
|
1999 |
Alpert CJ, Caldwell AE, Kahng AB, Markov IL. Partitioning with terminals: A `new' problem and new benchmarks Proceedings of the International Symposium On Physical Design. 151-157. |
0.491 |
|
1998 |
Cong J, Kahng AB, Koh C, Tsao C-A. Bounded-skew clock and Steiner routing Acm Transactions On Design Automation of Electronic Systems. 3: 341-388. DOI: 10.1145/293625.293628 |
0.384 |
|
1998 |
Alpert CJ, Huang JH, Kahng AB. Multilevel circuit partitioning Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 17: 655-667. DOI: 10.1109/43.712098 |
0.372 |
|
1998 |
Cong J, Kahng AB, Leung KS. Efficient algorithms for the minimum shortest path steiner arborescence problem with applications to VLSI physical design Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 17: 24-39. DOI: 10.1109/43.673630 |
0.389 |
|
1998 |
Alpert CJ, Chan TF, Kahng AB, Markov IL, Mulet P. Faster minimization of linear wirelength for global placement Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 17: 3-13. DOI: 10.1109/43.673628 |
0.583 |
|
1998 |
Kahng AB, Robins G, Walkup EA. How to test a tree Networks. 32: 189-197. DOI: 10.1002/(Sici)1097-0037(199810)32:3<189::Aid-Net3>3.0.Co;2-G |
0.608 |
|
1997 |
Kahng AB, Muddu S. An analytical delay model for RLC interconnects Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 16: 1507-1514. DOI: 10.1109/43.664231 |
0.332 |
|
1997 |
Hagen LW, Huang DJH, Kahng AB. On implementation choices for iterative improvement partitioning algorithms Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 16: 1199-1205. DOI: 10.1109/43.662682 |
0.353 |
|
1997 |
Hong I, Kahng AB, Moon B. Journal of Heuristics. 3: 63-81. DOI: 10.1023/A:1009624916728 |
0.359 |
|
1997 |
Alpert CJ, Kahng AB. Splitting an ordering into a partition to minimize diameter Journal of Classification. 14: 51-74. DOI: 10.1007/S003579900003 |
0.329 |
|
1996 |
Kahng AB, Tsao CWA. Planar-DME: A single-layer zero-skew clock tree router Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 15: 8-19. DOI: 10.1109/43.486268 |
0.391 |
|
1995 |
Hu TC, Kahng AB, Tsao CA. Old Bachelor Acceptance: A New Class of Non-Monotone Threshold Accepting Methods Orsa Journal On Computing. 7: 417-425. DOI: 10.1287/Ijoc.7.4.417 |
0.388 |
|
1995 |
KAHNG AB, ROBINS G, WALKUP EA. OPTIMAL ALGORITHMS FOR SUBSTRATE TESTING IN MULTI-CHIP MODULES International Journal of High Speed Electronics and Systems. 6: 595-612. DOI: 10.1142/S0129156495000213 |
0.632 |
|
1995 |
Boese K, Kahng A, McCoy B, Robins G. Near-optimal critical sink routing tree constructions Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 14: 1417-1436. DOI: 10.1109/43.476573 |
0.652 |
|
1995 |
Alpert CJ, Kahng AB. Multiway Partitioning Via Geometric Embeddings, Orderings, and Dynamic Programming Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 14: 1342-1358. DOI: 10.1109/43.469661 |
0.383 |
|
1995 |
Alpert C, Hu T, Huang J, Kahng A, Karger D. Prim-Dijkstra tradeoffs for improved performance-driven routing tree design Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 14: 890-896. DOI: 10.1109/43.391737 |
0.39 |
|
1995 |
Alpert CJ, Kahng AB. Recent directions in netlist partitioning: a survey Integration, the Vlsi Journal. 19: 1-81. DOI: 10.1016/0167-9260(95)00008-4 |
0.375 |
|
1994 |
Alpert CJ, Cong J, Kahng AB, Robins G, Sarrafzadeh M. On the Minimum Density Interconnection Tree
Problem Vlsi Design. 2: 157-169. DOI: 10.1155/1994/20983 |
0.627 |
|
1994 |
Hagen L, Kurdahi FJ, Kahng AB, Ramachandran C. On the Intrinsic Rent Parameter and Spectra-Based Partitioning Methodologies Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 13: 27-37. DOI: 10.1109/43.273752 |
0.344 |
|
1994 |
Boese KD, Kahng AB. Best-so-far vs. where-you-are: implications for optimal finite-time annealing Systems and Control Letters. 22: 71-78. DOI: 10.1016/0167-6911(94)90028-0 |
0.393 |
|
1994 |
Boese KD, Kahng AB, Muddu S. A new adaptive multi-start technique for combinatorial global optimizations Operations Research Letters. 16: 101-113. DOI: 10.1016/0167-6377(94)90065-5 |
0.375 |
|
1993 |
Hu TC, Kahng AB, Robins G. Optimal Robust Path Planning in General Environments Ieee Transactions On Robotics and Automation. 9: 775-784. DOI: 10.1109/70.265921 |
0.601 |
|
1993 |
Cong J, Kahng AB, Robins G. Matching-Based Methods for High-Performance Clock Routing Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 12: 1157-1169. DOI: 10.1109/43.238608 |
0.657 |
|
1992 |
Hu TC, Kahng AB, Robins G. Solution of the discrete Plateau problem. Proceedings of the National Academy of Sciences of the United States of America. 89: 9235-6. PMID 11607330 DOI: 10.1073/Pnas.89.19.9235 |
0.606 |
|
1992 |
Chao T, Hsu Y, Ho J, Kahng AB. Zero skew clock routing with minimum wirelength Ieee Transactions On Circuits and Systems Ii: Analog and Digital Signal Processing. 39: 799-814. DOI: 10.1109/82.204128 |
0.389 |
|
1992 |
Chen K, Cong J, Ding Y, Kahng A, Trajmar P. DAG-Map: graph-based FPGA technology mapping for delay optimization Ieee Design & Test of Computers. 9: 7-20. DOI: 10.1109/54.156154 |
0.312 |
|
1992 |
Kahng AB, Robins G. On Performance Bounds for a Class of Rectilinear Steiner Tree Heuristics in Arbitrary Dimension Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 11: 1462-1465. DOI: 10.1109/43.177409 |
0.561 |
|
1992 |
Kahng AB, Robins G. A New Class of Iterative Steiner Tree Heuristics with Good Performance Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 11: 893-902. DOI: 10.1109/43.144853 |
0.653 |
|
1992 |
Cong J, Kahng A, Robins G, Sarrafzadeh M, Wong C. Provably good performance-driven global routing Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 11: 739-752. DOI: 10.1109/43.137519 |
0.668 |
|
1992 |
Hu TC, Kahng AB, Robins G. Solution of the discrete Plateau problem Proceedings of the National Academy of Sciences of the United States of America. 89: 9235-9236. DOI: 10.1073/pnas.89.19.9235 |
0.565 |
|
1991 |
Kahng AB, Robins G. Optimal algorithms for extracting spatial regularity in images Pattern Recognition Letters. 12: 757-764. DOI: 10.1016/0167-8655(91)90073-U |
0.595 |
|
Show low-probability matches. |