☰

Stephen W. Director - Publications

Affiliations: 
1977 University of Florida, Gainesville, Gainesville, FL, United States 
 1977-1996 Carnegie Mellon University, Pittsburgh, PA 
 1996-2005 University of Michigan, Ann Arbor, Ann Arbor, MI 
 2005-2008 Drexel University, Philadelphia, PA, United States 
 2008- Northeastern University, Boston, MA, United States 
Area:
Electronics and Electrical Engineering, Computer Science
Website:
https://coe.northeastern.edu/people/director-stephen/
Tree Info Similar researchers PubMed Report error

46 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2001 Carball JA, Director SW. Application of constraint-based heuristics in collaborative design Proceedings - Design Automation Conference. 395-400.  0.33
1995 Krishna K, Director SW. The Linearized Performance Penalty (LPP) Method for Optimization of Parametric Yield and Its Reliability Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 14: 1557-1568. DOI: 10.1109/43.476585  0.302
1993 Feldmann P, Director SW. Integrated Circuit Quality Optimization using Surface Integrals Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 12: 1868-1879. DOI: 10.1109/43.251150  0.32
1993 Director SW, Feldmann P, Krishna K. Statistical integrated circuit design Ieee Journal of Solid-State Circuits. 28: 193-202. DOI: 10.1109/4.209985  0.393
1991 Low KK, Director SW. A New Methodology for the Design Centering of IC Fabrication Processes Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 10: 895-903. DOI: 10.1109/43.87599  0.387
1991 Strojwas AJ, Director SW. An Efficient Algorithm for Parametric Fault Simulation of Monolithic IC’s Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 10: 1049-1058. DOI: 10.1109/43.85741  0.598
1989 Low KK, Director SW. An Efficient Methodology for Building Macromodels of IC Fabrication Processes Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 8: 1299-1313. DOI: 10.1109/43.44510  0.385
1989 Bushnell M, Director SW. Automated Design Tool Execution in the Ulysses Design Environment Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 8: 279-287. DOI: 10.1109/43.21847  0.32
1989 Low KK, Director SW. New methodology for the design centering of IC fabrication processes . 194-197.  0.376
1989 Daniell J, Director SW. Object oriented approach to CAD tool control within a design framework Proceedings - Design Automation Conference. 197-202.  0.308
1988 Strojwas AJ, Director SW. VLSI: linking design and manufacturing Ieee Spectrum. 25: 24-28. DOI: 10.1109/6.8586  0.576
1988 Strojwas AJ, Director SW. The Process Engineer's Workbench Ieee Journal of Solid-State Circuits. 23: 377-386. DOI: 10.1109/4.998  0.607
1988 Low KK, Director SW. Efficient macromodeling approach for statistical IC process design . 16-19.  0.365
1987 Director SW. Manufacturing-Based Simulation: An Overview Ieee Circuits and Devices Magazine. 3: 3-9. DOI: 10.1109/MCD.1987.6323152  0.353
1987 Strojwas AJ, Director SW. PROCESS ENGINEER'S WORKBENCH Proceedings of the Custom Integrated Circuits Conference. 329-332.  0.603
1986 Walker H, Director SW. VLASIC: A Catastrophic Fault Yield Simulator for Integrated Circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 5: 541-556. DOI: 10.1109/TCAD.1986.1270225  0.313
1986 Maly W, Strojwas AJ, Director SW. VLSI Yield Prediction and Estimation: A Unified Framework Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 5: 114-130. DOI: 10.1109/Tcad.1986.1270182  0.604
1986 Nassif SR, Strojwas AJ, Director SW. A Methodology for Worst-Case Analysis of Integrated Circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 5: 104-113. DOI: 10.1109/TCAD.1986.1270181  0.609
1986 Spanos CJB, Director SW. Parameter Extraction for Statistical IC Process Characterization Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 5: 66-78. DOI: 10.1109/TCAD.1986.1270178  0.334
1986 Low KK, Director SW. PED: A GRAPHICAL PROCESS EDITOR Proceedings - Ieee International Symposium On Circuits and Systems. 560-563.  0.337
1985 Sakallah KA, Director SW. SAMSON2: An Event Driven VLSI Circuit Simulator Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 4: 668-684. DOI: 10.1109/Tcad.1985.1270167  0.305
1985 Strojwas AJ, Director SW. A Pattern Recognition Based Method for IC Failure Analysis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 4: 76-92. DOI: 10.1109/TCAD.1985.1270100  0.598
1985 Director SW, Maly W, Rutenbar RA, Shen JP, Siewiorek DP, Strojwas AJ, Thomas DE. Integrated CAD, CAM and CAT of VLSI Circuits and Systems: The CMU Perspective Ieee Design and Test of Computers. 2: 87-100. DOI: 10.1109/Mdt.1985.294767  0.538
1985 Walker H, Director SW. VLASIC: A YIELD SIMULATOR FOR INTEGRATED CIRCUITS . 318-320.  0.361
1984 Nassif SR, Strojwas AJ, Director SW. FABRICS II: A Statistically Based IC Fabrication Process Simulator Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 3: 40-46. DOI: 10.1109/TCAD.1984.1270055  0.618
1984 Glannopoulos DJ, Director SW. IC FABRICATION PROCESS OPTIMIZATION . 164.  0.327
1983 Spanos CJ, Director SW. PROMETHEUS: A PROGRAM FOR VLSI PROCESS PARAMETER EXTRACTION . 176-177.  0.467
1983 Strojwas AJ, Nassif SR, Director SW. METHODOLOGY FOR WORST CASE DESIGN OF INTEGRATED CIRCUITS . 152-153.  0.601
1983 Trick M, Strojwas AJ, Director SW. FAST RC SIMULATION FOR VLSI INTERCONNECT . 178-179.  0.545
1982 Vidigal LM, Director SW. A Design Centering Algorithm for Nonconvex Regions of Acceptability Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 1: 13-24. DOI: 10.1109/TCAD.1982.1269992  0.412
1982 Strojwas AJ, Director SW. PATTERN RECOGNITION BASED METHOD FOR IC FAILURE ANALYSIS Proceedings - Ieee International Conference On Circuits and Computers. 560-563.  0.529
1982 Nassif SR, Strojwas AJ, Director SW. FABRICS II: A STATISTICAL SIMULATOR OF THE IC FABRICATION PROCESS Proceedings - Ieee International Conference On Circuits and Computers. 298-301.  0.577
1981 Lightner MR, Director SW. Multiple Criterion Optimization with Yield Maximization Ieee Transactions On Circuits and Systems. 28: 781-791. DOI: 10.1109/Tcs.1981.1085049  0.7
1981 Director SW, Siewiorek D, Parker AC, Thomas DE. A Design Methodology and Computer Aids for Digital VLSI Systems Ieee Transactions On Circuits and Systems. 28: 634-645. DOI: 10.1109/Tcs.1981.1085036  0.332
1981 Lightner MR, Director SW. Multiple Criterion Optimization for the Design of Electronic Circuits Ieee Transactions On Circuits and Systems. 28: 169-179. DOI: 10.1109/Tcs.1981.1084969  0.697
1981 Maly W, Strojwas AJ, Director SW. FABRICATION BASED STATISTICAL DESIGN OF MONOLITHIC IC's Proceedings - Ieee International Symposium On Circuits and Systems. 1: 135-113.  0.634
1981 Director SW, Vidigal LM. STATISTICAL CIRCUIT DESIGN: A SOMEWHAT BIASED SURVEY Circuit Theory and Design, Proceedings of the European Conference. 15-24.  0.323
1981 Director SW, Parker AC, Siewiorek DP, Thomas DE. CARNEGIE-MELLON UNIVERSITY DESIGN AUTOMATION SYSTEM: CURRENT STATUS AND FUTURE DIRECTION Proceedings - Ieee International Symposium On Circuits and Systems. 2: 406-440.  0.318
1980 Lightner MR, Director SW. YIELD MAXIMIZATION FOR USE IN MULTIPLE CRITERION OPTIMIZATION OF ELECTRONIC CIRCUITS Proceedings - Ieee International Symposium On Circuits and Systems. 288-291.  0.366
1979 Brayton RK, Hachtel GD, Director SW, Vidigal LM. A New Algorithm for Statistical Circuit Design Based on Quasi-Newton Methods and Function Splitting Ieee Transactions On Circuits and Systems. 26: 784-794. DOI: 10.1109/Tcs.1979.1084701  0.302
1978 Director SW, Hachtel GD, Vidigal LM. Computationally Efficient Yield Estimation Procedures Based on Simplicial Approximation Ieee Transactions On Circuits and Systems. 25: 121-130. DOI: 10.1109/TCS.1978.1084450  0.369
1977 Director SW, Hachtel GD. The Simplicial Approximation Approach to Design Centering Ieee Transactions On Circuits and Systems. 24: 363-372. DOI: 10.1109/TCS.1977.1084353  0.346
1976 Director SW, Hachtel GD. SIMPLICIAL APPROXIMATION FOR DESIGN CENTERING Ibm Tech Disclosure Bull. 19: 1490-1493.  0.34
1973 Director SW, Bristol WA, Brodersen AJ. Fabrication-Based Optimization of Linear Integrated Circuits Ieee Transactions On Circuit Theory. 20: 690-697. DOI: 10.1109/TCT.1973.1083763  0.348
1973 Director SW. COMPUTER-AIDED DESIGN OF LINEAR INTEGRATED CIRCUIT AMPLIFIERS . 384-386.  0.349
1971 Brodersen AJ, Director SW, Bristol WA. Simultaneous Automated AC and DC Design of Linear Integrated Circuit Amplifiers Ieee Transactions On Circuit Theory. 18: 50-58. DOI: 10.1109/TCT.1971.1083216  0.321
Show low-probability matches.