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Nan Sun, Ph.D. - Publications

Affiliations: 
2010 Harvard University, Cambridge, MA, United States 
 2020 Electrical and Computer Engineering University of Texas at Austin, Austin, Texas, U.S.A. 
 2020- Tsinghua National University, Beijing, Beijing Shi, China 
Website:
https://www.sunresearchgroup.top/en/
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57 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Xu R, Hsu C, Kalani S, Ban J, Wang Q, Ochoa I, Burton C, Unal M, Sun N, Kinget P, Parsons J, Andeen T. Single-Event Upset Responses of Metal–Oxide–Metal Capacitors and Diodes Used in Bulk 65-nm CMOS Analog Circuits Ieee Transactions On Nuclear Science. 67: 698-707. DOI: 10.1109/Tns.2020.2974229  0.342
2020 Zhuang H, Xi X, Sun N, Orshansky M. A Strong Subthreshold Current Array PUF Resilient to Machine Learning Attacks Ieee Transactions On Circuits and Systems I-Regular Papers. 67: 135-144. DOI: 10.1109/Tcsi.2019.2945247  0.309
2020 Chen H, Liu M, Xu B, Zhu K, Tang X, Li S, Lin Y, Sun N, Pan DZ. MAGICAL: An Open-Source Fully Automated Analog IC Layout System from Netlist to GDSII Ieee Design & Test of Computers. 1-1. DOI: 10.1109/Mdat.2020.3024153  0.656
2020 Tang X, Yang X, Zhao W, Hsu C, Liu J, Shen L, Mukherjee A, Shi W, Li S, Pan DZ, Sun N. A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier Ieee Journal of Solid-State Circuits. 1-1. DOI: 10.1109/Jssc.2020.3020194  0.707
2020 Liu J, Tang X, Zhao W, Shen L, Sun N. A 13-bit 0.005-mm² 40-MS/s SAR ADC With kT/C Noise Cancellation Ieee Journal of Solid-State Circuits. 1-1. DOI: 10.1109/Jssc.2020.3016656  0.301
2020 Mukherjee A, Gandara M, Yang X, Shen L, Tang X, Hsu C, Sun N. A 74.5-dB Dynamic Range 10-MHz BW CT-ΔΣ ADC With Distributed-Input VCO and Embedded Capacitive-π Network in 40-nm CMOS Ieee Journal of Solid-State Circuits. 1-1. DOI: 10.1109/Jssc.2020.3012623  0.322
2020 Tang X, Li S, Yang X, Shen L, Zhao W, Williams RP, Liu J, Tan Z, Hall NA, Pan DZ, Sun N. An Energy-Efficient Time-Domain Incremental Zoom Capacitance-to-Digital Converter Ieee Journal of Solid-State Circuits. 1-1. DOI: 10.1109/Jssc.2020.3005812  0.669
2020 Hsu C, Andeen TR, Sun N. A Pipeline SAR ADC With Second-Order Interstage Gain Error Shaping Ieee Journal of Solid-State Circuits. 55: 1032-1042. DOI: 10.1109/Jssc.2019.2962140  0.412
2020 Sun N, Gu J. Guest Editorial 2019 Custom Integrated Circuits Conference Ieee Journal of Solid-State Circuits. 55: 523-524. DOI: 10.1109/Jssc.2019.2961757  0.337
2020 Tang X, Shen L, Kasap B, Yang X, Shi W, Mukherjee A, Pan DZ, Sun N. An Energy-Efficient Comparator With Dynamic Floating Inverter Amplifier Ieee Journal of Solid-State Circuits. 55: 1011-1022. DOI: 10.1109/Jssc.2019.2960485  0.396
2020 Zhao W, Li S, Xu B, Yang X, Tang X, Shen L, Lu N, Pan DZ, Sun N. A 0.025-mm 2 0.8-V 78.5-dB SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL- $\Delta\Sigma$ M Structure Ieee Journal of Solid-State Circuits. 55: 666-679. DOI: 10.1109/Jssc.2019.2959479  0.416
2020 Zhang Y, Sanyal A, Yu X, Quan X, Wen K, Tang X, Jin G, Geng L, Sun N. A Fractional- $N$ PLL With Space–Time Averaging for Quantization Noise Reduction Ieee Journal of Solid-State Circuits. 55: 602-614. DOI: 10.1109/Jssc.2019.2950154  0.4
2020 Zhong Y, Li S, Tang X, Shen L, Zhao W, Wu S, Sun N. A Second-Order Purely VCO-Based CT $\Delta\Sigma$ ADC Using a Modified DPLL Structure in 40-nm CMOS Ieee Journal of Solid-State Circuits. 55: 356-368. DOI: 10.1109/Jssc.2019.2948008  0.75
2020 Shen Y, Tang X, Shen L, Zhao W, Xin X, Liu S, Zhu Z, Sathe VS, Sun N. A 10-bit 120-MS/s SAR ADC With Reference Ripple Cancellation Technique Ieee Journal of Solid-State Circuits. 55: 680-692. DOI: 10.1109/Jssc.2019.2946215  0.414
2020 Li S, Pan DZ, Sun N. An OTA-Less Second-Order VCO-Based CT $\Delta\Sigma$ Modulator Using an Inherent Passive Integrator and Capacitive Feedback Ieee Journal of Solid-State Circuits. 55: 1337-1350. DOI: 10.1109/Jssc.2019.2941007  0.742
2019 Li D, Zhu Z, Ding R, Liu M, Yang Y, Sun N. A 10-Bit 600-MS/s Time-Interleaved SAR ADC With Interpolation-Based Timing Skew Calibration Ieee Transactions On Circuits and Systems Ii-Express Briefs. 66: 16-20. DOI: 10.1109/Tcsii.2018.2828649  0.385
2019 Song J, Ragab K, Tang X, Sun N. A 10-b 600-MS/s 2-Way Time-Interleaved SAR ADC With Mean Absolute Deviation-Based Background Timing-Skew Calibration Ieee Transactions On Circuits and Systems I-Regular Papers. 66: 2876-2887. DOI: 10.1109/Tcsi.2019.2907581  0.364
2019 Liu J, Hsu C, Tang X, Li S, Wen G, Sun N. Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters Ieee Transactions On Circuits and Systems I-Regular Papers. 66: 1342-1354. DOI: 10.1109/Tcsi.2018.2879582  0.698
2019 Ricketts DS, Shi E, Li X, Sun N, Yildirim OO, Ham D. Electrical Solitons for Microwave Systems: Harmonizing Nonlinearity and Dispersion with Nonlinear Transmission Line Ieee Microwave Magazine. 20: 123-134. DOI: 10.1109/Mmm.2019.2891382  0.735
2019 Shen L, Sun N, Shen Y, Li Z, Shi W, Tang X, Li S, Zhao W, Zhang M, Zhu Z. A Two-Step ADC With a Continuous-Time SAR-Based First Stage Ieee Journal of Solid-State Circuits. 54: 3375-3385. DOI: 10.1109/Jssc.2019.2933951  0.739
2019 Zhuang H, Guo W, Liu J, Tang H, Zhu Z, Chen L, Sun N. A Second-Order Noise-Shaping SAR ADC With Passive Integrator and Tri-Level Voting Ieee Journal of Solid-State Circuits. 54: 1636-1647. DOI: 10.1109/Jssc.2019.2900150  0.462
2019 Palermo S, Sun N. Introduction to the Special Section on the 2018 Custom Integrated Circuits Conference Ieee Journal of Solid-State Circuits. 54: 611-612. DOI: 10.1109/Jssc.2019.2893079  0.317
2019 Liu J, Li S, Guo W, Wen G, Sun N. A 0.029-mm 2 17-fJ/Conversion-Step Third-Order CT $\Delta\Sigma$ ADC With a Single OTA and Second-Order Noise-Shaping SAR Quantizer Ieee Journal of Solid-State Circuits. 54: 428-440. DOI: 10.1109/Jssc.2018.2879955  0.732
2018 Li S, Qiao B, Gandara M, Pan DZ, Sun N. A 13-ENOB Second-Order Noise-Shaping SAR ADC Realizing Optimized NTF Zeros Using the Error-Feedback Structure Ieee Journal of Solid-State Circuits. 53: 3484-3496. DOI: 10.1109/Jssc.2018.2871081  0.739
2018 Shen L, Lu N, Sun N. A 1-V 0.25- $\mu \text{W}$ Inverter Stacking Amplifier With 1.07 Noise Efficiency Factor Ieee Journal of Solid-State Circuits. 53: 896-905. DOI: 10.1109/Jssc.2017.2786724  0.402
2018 Yoon Y, Sun N. A 6-bit 0.81-mW 700-MS/s SAR ADC With Sparkle-Code Correction, Resolution Enhancement, and Background Window Width Calibration Ieee Journal of Solid-State Circuits. 53: 789-798. DOI: 10.1109/Jssc.2017.2768404  0.375
2017 Chen L, Ragab K, Tang X, Song J, Sanyal A, Sun N. A 0.95-mW 6-b 700-MS/s Single-Channel Loop-Unrolled SAR ADC in 40-nm CMOS Ieee Transactions On Circuits and Systems Ii-Express Briefs. 64: 244-248. DOI: 10.1109/Tcsii.2016.2559513  0.43
2017 Song J, Ragab K, Tang X, Sun N. A 10-b 800-MS/s Time-Interleaved SAR ADC With Fast Variance-Based Timing-Skew Calibration Ieee Journal of Solid-State Circuits. 52: 2563-2575. DOI: 10.1109/Jssc.2017.2713523  0.357
2017 Guo W, Kim Y, Tewfik AH, Sun N. A Fully Passive Compressive Sensing SAR ADC for Low-Power Wireless Sensors Ieee Journal of Solid-State Circuits. 52: 2154-2167. DOI: 10.1109/Jssc.2017.2695573  0.351
2017 Li S, Mukherjee A, Sun N. A 174.3-dB FoM VCO-Based CT $\Delta \Sigma $ Modulator With a Fully-Digital Phase Extended Quantizer and Tri-Level Resistor DAC in 130-nm CMOS Ieee Journal of Solid-State Circuits. 52: 1940-1952. DOI: 10.1109/Jssc.2017.2693244  0.741
2017 Sanyal A, Sun N. An Energy-Efficient Hybrid SAR-VCO $\Delta \Sigma $ Capacitance-to-Digital Converter in 40-nm CMOS Ieee Journal of Solid-State Circuits. 52: 1966-1976. DOI: 10.1109/Jssc.2017.2693237  0.445
2017 Chen L, Tang X, Sanyal A, Yoon Y, Cong J, Sun N. A 0.7-V 0.6- $\mu \text{W}$ 100-kS/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction Ieee Journal of Solid-State Circuits. 52: 1388-1398. DOI: 10.1109/Jssc.2017.2656138  0.4
2017 Ragab K, Sun N. A 12-b ENOB 2.5-MHz BW VCO-Based 0-1 MASH ADC With Direct Digital Background Calibration Ieee Journal of Solid-State Circuits. 52: 433-447. DOI: 10.1109/Jssc.2016.2615321  0.426
2017 Liu J, Wen G, Sun N. Second-order DAC MES for SAR ADCs Electronics Letters. 53: 1570-1572. DOI: 10.1049/El.2017.3138  0.325
2016 Sanyal A, Sun N. Second-order VCO-based δσ ADC using a modified DPLL Electronics Letters. 52: 1204-1205. DOI: 10.1049/El.2016.1428  0.364
2016 Sanyal A, Yu X, Zhang Y, Sun N. Fractional-N PLL with multi-element fractional divider for noise reduction Electronics Letters. 52: 809-810. DOI: 10.1049/El.2016.0680  0.364
2015 Ragab K, Chen L, Sanyal A, Sun N. Digital background calibration for pipelined adcs based on comparator decision time quantization Ieee Transactions On Circuits and Systems Ii: Express Briefs. 62: 456-460. DOI: 10.1109/Tcsii.2014.2387532  0.401
2015 Rahman M, Sanyal A, Sun N. A novel hybrid radix-3/Radix-2 SAR ADC with fast convergence and low hardware complexity Ieee Transactions On Circuits and Systems Ii: Express Briefs. 62: 426-430. DOI: 10.1109/Tcsii.2014.2385214  0.41
2015 Sanyal A, Chen L, Sun N. Dynamic element matching with signal-independent element transition rates for multibit ΔΣ modulators Ieee Transactions On Circuits and Systems I: Regular Papers. 62: 1325-1334. DOI: 10.1109/Tcsi.2015.2407434  0.346
2015 Lee K, Yoon Y, Sun N. A Scaling-Friendly Low-Power Small-Area $\Delta\Sigma$ ADC With VCO-Based Integrator and Intrinsic Mismatch Shaping Capability Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 5: 561-573. DOI: 10.1109/Jetcas.2015.2502166  0.394
2015 Sanyal A, Sun N. Dynamic Element Matching Techniques for Static and Dynamic Errors in Continuous-Time Multi-Bit ∆Σ Modulators Ieee Journal On Emerging and Selected Topics in Circuits and Systems. DOI: 10.1109/Jetcas.2015.2502160  0.342
2014 Ha D, Paulsen J, Sun N, Song YQ, Ham D. Scalable NMR spectroscopy with semiconductor chips. Proceedings of the National Academy of Sciences of the United States of America. 111: 11955-60. PMID 25092330 DOI: 10.1073/Pnas.1402015111  0.603
2014 Sanyal A, Wang P, Sun N. A thermometer-like mismatch shaping technique with minimum element transition activity for multibit ΔΣ DACs Ieee Transactions On Circuits and Systems Ii: Express Briefs. 61: 461-465. DOI: 10.1109/Tcsii.2014.2327342  0.337
2014 Sanyal A, Sun N. An energy-efficient low frequency-dependence switching technique for SAR ADCs Ieee Transactions On Circuits and Systems Ii: Express Briefs. 61: 294-298. DOI: 10.1109/Tcsii.2014.2304890  0.322
2013 Ragab K, Kozak M, Sun N. Thermal Noise Analysis of a Programmable-Gain Switched-Capacitor Amplifier With Input Offset Cancellation Ieee Transactions On Circuits and Systems Ii-Express Briefs. 60: 147-151. DOI: 10.1109/Tcsii.2013.2240831  0.388
2013 Sanyal A, Sun N. SAR ADC architecture with 98% reduction in switching energy over conventional scheme Electronics Letters. 49: 263-264. DOI: 10.1049/El.2012.3900  0.341
2013 Sun N, Liu Y, Qin L, Lee H, Weissleder R, Ham D. Small NMR biomolecular sensors Solid-State Electronics. 84: 13-21. DOI: 10.1016/J.Sse.2013.02.005  0.634
2012 Sun N. Exploiting process variation and noise in comparators to calibrate interstage gain nonlinearity in pipelined ADCs Ieee Transactions On Circuits and Systems I: Regular Papers. 59: 685-695. DOI: 10.1109/Tcsi.2011.2169854  0.427
2012 Kim Y, Guo W, Gowreesunker BV, Sun N, Tewfik AH. Multi-Channel Sparse Data Conversion With a Single Analog-to-Digital Converter Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 2: 470-481. DOI: 10.1109/Jetcas.2012.2222833  0.313
2011 Sun N, Cao P. Low-complexity high-order vector-based mismatch shaping in multibit sigma ADCs Ieee Transactions On Circuits and Systems Ii: Express Briefs. 58: 872-876. DOI: 10.1109/Tcsii.2011.2172717  0.331
2011 Sun N. High-order mismatch-shaping in multibit DACs Ieee Transactions On Circuits and Systems Ii: Express Briefs. 58: 346-350. DOI: 10.1109/Tcsii.2011.2158163  0.33
2011 Sun N, Yoon TJ, Lee H, Andress W, Weissleder R, Ham D. Palm NMR and 1-chip NMR Ieee Journal of Solid-State Circuits. 46: 342-352. DOI: 10.1109/Jssc.2010.2074630  0.731
2009 Sun N, Liu Y, Lee H, Weissleder R, Ham D. CMOS RF biosensor utilizing nuclear magnetic resonance Ieee Journal of Solid-State Circuits. 44: 1629-1643. DOI: 10.1109/Jssc.2009.2017007  0.664
2008 Sun N, Andress WF, Woo K, Ham D. Surpassing Tradeoffs by Separation: Examples in Transmission Line Resonators, Phase-Locked Loops, and Analog-to-Digital Converters Jsts:Journal of Semiconductor Technology and Science. 8: 210-220. DOI: 10.5573/Jsts.2008.8.3.210  0.731
2008 Sun N, Lee HS, Ham D. Digital background calibration in pipelined ADCs using commutated feedback capacitor switching Ieee Transactions On Circuits and Systems Ii: Express Briefs. 55: 877-881. DOI: 10.1109/Tcsii.2008.924369  0.667
2008 Ricketts D, Li X, Sun N, Woo K, Ham D. Authors' response Ieee Journal of Solid-State Circuits. 43: 1492-1493. DOI: 10.1109/Jssc.2008.923730  0.709
2007 Ricketts DS, Li X, Sun N, Woo K, Ham D. On the self-generation of electrical soliton pulses Ieee Journal of Solid-State Circuits. 42: 1657-1667. DOI: 10.1109/Jssc.2007.900291  0.749
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