Bo Yao, Ph.D. - Publications
Affiliations: | 2005 | University of California, San Diego, La Jolla, CA |
Area:
Computer Science, Electronics and Electrical EngineeringYear | Citation | Score | |||
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2011 | Zhang L, Zhang Y, Chen H, Yao B, Hamilton K, Cheng C. On-Chip Interconnect Analysis of Performance and Energy Metrics Under Different Design Goals Ieee Transactions On Very Large Scale Integration Systems. 19: 520-524. DOI: 10.1109/Tvlsi.2009.2035322 | 0.448 | |||
2007 | Zhou S, Yao B, Chen H, Zhu Y, Hutton M, Collins T, Srinivasan S, Chou NC, Suaris P, Cheng CK. Efficient timing analysis with known false paths using biclique covering Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 959-969. DOI: 10.1109/Tcad.2006.885737 | 0.509 | |||
2003 | Yao B, Chen H, Cheng C, Graham R. Floorplan representations: Complexity and connections Acm Transactions On Design Automation of Electronic Systems. 8: 55-80. DOI: 10.1145/606603.606607 | 0.439 | |||
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