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Juin J. Liou - Publications

Affiliations: 
University of Central Florida, Orlando, FL, United States 
Area:
Electronics and Electrical Engineering, Electricity and Magnetism Physics, Materials Science Engineering
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207 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2019 Hou F, Liu J, Liu Z, Huang W, Gong T, Yu B, Liou JJ. New Diode-Triggered Silicon-Controlled Rectifier for Robust Electrostatic Discharge Protection at High Temperatures Ieee Transactions On Electron Devices. 66: 2044-2048. DOI: 10.1109/Ted.2019.2900052  0.48
2019 Du F, Hou F, Liu Z, Liu J, Liou JJ. Bidirectional silicon-controlled rectifier for advanced ESD protection applications Electronics Letters. 55: 112-114. DOI: 10.1049/El.2018.6686  0.484
2018 Yang Z, Yang Y, Yu N, Liou JJ. Improving ESD Protection Robustness Using SiGe Source/Drain Regions in Tunnel FET. Micromachines. 9. PMID 30545073 DOI: 10.3390/mi9120657  0.349
2018 Hu T, Dong S, Jin H, Wong H, Xu Z, Li X, Liou JJ. A double snapback SCR ESD protection scheme for 28 nm CMOS process Microelectronics Reliability. 84: 20-25. DOI: 10.1016/J.Microrel.2018.03.010  0.434
2018 Yang Z, Yang Y, Yu N, Liou JJ. Statically triggered 3×VDD-Tolerant ESD detection circuit in a 90-nm low-voltage CMOS process Microelectronics Journal. 78: 88-93. DOI: 10.1016/J.Mejo.2018.05.011  0.478
2017 García-Sánchez FJ, Romero B, Lugo-Muñoz DC, Pozo GD, Arredondo B, Liou JJ, Ortiz-Conde A. Modelling Solar Cell S-Shaped I-V Characteristics With Dc Lumped-Parameter Equivalent Circuits ­ A Review Facta Universitatis. Series Electronics and Energetics. 30: 327-350. DOI: 10.2298/Fuee1703327G  0.388
2017 Yu F, Deng W, Huang J, Ma X, Liou JJ. A Physics-Based Compact Model for Symmetrical Double-Gate Polysilicon Thin-Film Transistors Ieee Transactions On Electron Devices. 64: 2221-2227. DOI: 10.1109/Ted.2017.2679340  0.386
2017 Yu F, Ma X, Deng W, Liou JJ, Huang J. A surface-potential-based drain current compact model for a-InGaZnO thin-film transistors in Non-Degenerate conduction regime Solid-State Electronics. 137: 38-43. DOI: 10.1016/J.Sse.2017.07.016  0.418
2017 Liu F, Liu Z, Liu J, Cheng H, Zhao L, Tian R, Song S, Liou JJ. A novel vertical SCR for ESD protection in 40 V HV bipolar process Microelectronics Reliability. 78: 307-310. DOI: 10.1016/J.Microrel.2017.09.018  0.447
2017 Dong A, Salcedo JA, Parthasarathy S, Zhou Y, Luo S, Hajjar J, Liou JJ. ESD protection structure with reduced capacitance and overshoot voltage for high speed interface applications Microelectronics Reliability. 79: 201-205. DOI: 10.1016/J.Microrel.2017.03.014  0.777
2017 Ortiz-Conde A, Sucre-González A, Zárate-Rincón F, Torres-Torres R, Murphy-Arteaga RS, Liou JJ, García-Sánchez FJ. A review of DC extraction methods for MOSFET series resistance and mobility degradation model parameters Microelectronics Reliability. 69: 1-16. DOI: 10.1016/J.Microrel.2016.12.016  0.404
2016 Xi Y, Salcedo JA, Dong A, Liou JJ, Hajjar JJ. Robust Protection Device for Electrostatic Discharge/Electromagnetic Interference in Industrial Interface Applications Ieee Transactions On Device and Materials Reliability. 16: 263-265. DOI: 10.1109/Tdmr.2016.2530701  0.779
2016 Miao M, Zhou Y, Salcedo JA, Hajjar JJ, Liou JJ. A New Method to Estimate Failure Temperatures of Semiconductor Devices under Electrostatic Discharge Stresses Ieee Electron Device Letters. DOI: 10.1109/Led.2016.2608328  0.72
2016 Huang X, Liou JJ, Liu Z, Liu F, Liu J, Cheng H. A New High Holding Voltage Dual-Direction SCR with Optimized Segmented Topology Ieee Electron Device Letters. 37: 1311-1313. DOI: 10.1109/Led.2016.2598063  0.51
2016 Jia Z, Wu X, Zhang M, Liou JJ. Study on leakage current properties of BiFeO3 thin films with Pb(Zr,Ti)O3 buffer layer Ferroelectrics. 504: 172-179. DOI: 10.1080/00150193.2016.1241067  0.322
2016 Deng W, Huang J, Ma X, Liou JJ, Yu F. A compact drain current model for heterostructure HEMTs including 2DEG density solution with two subbands Solid-State Electronics. 115: 54-59. DOI: 10.1016/J.Sse.2015.10.005  0.38
2016 Liang W, Dong A, Li H, Miao M, Kuo C, Klebanov M, Liou JJ. Characteristics of ESD protection devices operated under elevated temperatures Microelectronics Reliability. 66: 46-51. DOI: 10.1016/J.Microrel.2016.10.008  0.492
2015 Zhou Y, Miao M, Salcedo JA, Hajjar JJ, Liou JJ. Compact Thermal Failure Model for Devices Subject to Electrostatic Discharge Stresses Ieee Transactions On Electron Devices. 62: 4128-4134. DOI: 10.1109/Ted.2015.2491223  0.75
2015 Zeng J, Dong S, Liou JJ, Han Y, Zhong L, Wang W. Design and analysis of an area-efficient high holding voltage ESD protection device Ieee Transactions On Electron Devices. 62: 606-614. DOI: 10.1109/TED.2014.2381511  0.363
2015 Liang H, Gu X, Dong S, Liou JJ. RC-Embedded LDMOS-SCR with High Holding Current for High-Voltage I/O ESD Protection Ieee Transactions On Device and Materials Reliability. 15: 495-499. DOI: 10.1109/Tdmr.2015.2463120  0.444
2015 Wang Z, Klebanov M, Cooper RB, Liang W, Courtney S, Liou JJ. No-Snapback Silicon-Controlled Rectifier for Electrostatic Discharge Protection of High-Voltage ICs Ieee Electron Device Letters. 36: 1121-1123. DOI: 10.1109/Led.2015.2479612  0.452
2015 Sun RC, Wang Z, Klebanov M, Liang W, Liou JJ, Liu DG. Silicon-controlled rectifier for electrostatic discharge protection solutions with minimal snapback and reduced overshoot voltage Ieee Electron Device Letters. 36: 424-426. DOI: 10.1109/Led.2015.2413844  0.47
2015 Deng W, Huang J, Ma X, Liou JJ. An explicit surface potential calculation and compact current model for AlGaN/GaN HEMTs Ieee Electron Device Letters. 36: 108-110. DOI: 10.1109/Led.2015.2388706  0.404
2015 Jia Z, Xu JL, Wu X, Zhang MM, Liou JJ. A back-gated ferroelectric field-effect transistor with an Al-doped zinc oxide channel Chinese Physics Letters. 32. DOI: 10.1088/0256-307X/32/2/028501  0.359
2015 Wang W, Jin H, Guo W, Dong S, Liang W, Liou JJ, Han Y. Very small snapback silicon-controlled rectifier for electrostatic discharge protection in 28nm processing Microelectronics Reliability. DOI: 10.1016/J.Microrel.2015.12.038  0.451
2015 Xi Y, Salcedo JA, Zhou Y, Liou JJ, Hajjar JJ. Design and characterization of ESD solutions with EMC robustness for automotive applications Microelectronics Reliability. DOI: 10.1016/J.Microrel.2015.09.018  0.733
2015 García-Sánchez FJ, Ortiz-Conde A, Muci J, Sucre-González A, Liou JJ. A unified look at the use of successive differentiation and integration in MOSFET model parameter extraction Microelectronics Reliability. 55: 293-307. DOI: 10.1016/J.Microrel.2014.11.013  0.381
2015 Miao M, Zhou Y, Salcedo JA, Hajjar JJ, Liou JJ. Compact failure modeling for devices subject to electrostatic discharge stresses - A review pertinent to CMOS reliability simulation Microelectronics Reliability. 55: 15-23. DOI: 10.1016/J.Microrel.2014.10.015  0.75
2014 Jia Z, Xu J, Wu X, Zhang M, Zhang N, Liu J, Liu Z, Liou JJ. Metal-semiconductor-insulator-metal structure field-effect transistors based on zinc oxides and doped ferroelectric thin films Journal of British Studies. 1633. DOI: 10.1557/Opl.2014.130  0.349
2014 Ho CS, Chang SJ, Chen SC, Liou JJ, Li H. A reliable Si3N4/Al2O3-HfO 2 Stack MIM capacitor for high-voltage analog applications Ieee Transactions On Electron Devices. 61: 2944-2949. DOI: 10.1109/Ted.2014.2332046  0.434
2014 Wang Z, Sun RC, Liou JJ, Liu DG. Optimized pmos-triggered bidirectional SCR for low-voltage esd protection applications Ieee Transactions On Electron Devices. 61: 2588-2594. DOI: 10.1109/TED.2014.2320827  0.335
2014 He L, Chiang TK, Liou JJ, Zheng W, Liu Z. A new analytical subthreshold potential/current model for quadruple-gate junctionless MOSFETs Ieee Transactions On Electron Devices. 61: 1972-1978. DOI: 10.1109/TED.2014.2318325  0.3
2014 Luo S, Salcedo JA, Parthasarathy S, Zhou Y, Hajjar JJ, Liou JJ. In situ ESD protection structure for variable operating voltage interface applications in 28-nm CMOS process Ieee Transactions On Device and Materials Reliability. 14: 1061-1067. DOI: 10.1109/Tdmr.2014.2364719  0.755
2014 Xi Y, Malobabic S, Vashchenko V, Liou JJ. Miscorrelation between air gap discharge and human metal model stresses due to multi-finger turn-on effect Ieee Transactions On Device and Materials Reliability. 14: 864-868. DOI: 10.1109/Tdmr.2014.2332432  0.41
2014 Luo S, Salcedo JA, Hajjar JJ, Zhou Y, Liou JJ. A novel product-level human metal model characterization methodology Ieee Transactions On Device and Materials Reliability. 14: 772-774. DOI: 10.1109/Tdmr.2014.2311298  0.711
2014 Luo S, Salcedo JA, Hajjar JJ, Zhou Y, Liou JJ. ESD protection device with dual-polarity conduction and high blocking voltage realized in CMOS process Ieee Electron Device Letters. 35: 437-439. DOI: 10.1109/Led.2014.2305634  0.771
2014 Liang H, Huang L, Gu X, Cao H, Dong S, Liou JJ. Key factors affecting trigger voltage of SCRS for ESD protection Proceedings - 2014 Ieee 12th International Conference On Solid-State and Integrated Circuit Technology, Icsict 2014. DOI: 10.1109/ICSICT.2014.7021290  0.363
2014 Liu J, Liu Z, Jia Z, Liou JJ. A novel DTSCR with a variation lateral base doping structure to improve turn-on speed for ESD protection Journal of Semiconductors. 35. DOI: 10.1088/1674-4926/35/6/064010  0.438
2014 Jia Z, Zhang G, Liu J, Liu Z, Liou JJ. Reference voltage generation scheme enhancing speed and reliability for 1T1C-type FRAM Electronics Letters. 50: 154-156. DOI: 10.1049/El.2013.3193  0.359
2014 Cui Q, Parthasarathy S, Salcedo JA, Liou JJ, Hajjar JJ, Zhou Y. Design optimization of SiGe BiCMOS Silicon Controlled Rectifier for Charged Device Model (CDM) protection applications Microelectronics Reliability. 54: 57-63. DOI: 10.1016/J.Microrel.2013.09.021  0.749
2014 Liu W, Liou JJ. Characterization of nanowire devices under electrostatic discharge stress conditions Nanowire Field Effect Transistors: Principles and Applications. 2147483647: 129-151. DOI: 10.1007/978-1-4614-8124-9_6  0.346
2014 Aliaj B, Vashcheiiko VA, Liou JJ, Mitchell T. Overcoming multi finger turn-on in HV DIACs using local polv-ballasting Electrical Overstress/Electrostatic Discharge Symposium Proceedings. 2014.  0.353
2013 Wang Z, Liou JJ, Cho KL, Chiu HC. Development of an electrostatic discharge protection solution in gan technology Ieee Electron Device Letters. 34: 1491-1493. DOI: 10.1109/Led.2013.2283865  0.454
2013 Cui Q, Salcedo JA, Parthasarathy S, Zhou Y, Liou JJ, Hajjar JJ. High-robustness and low-capacitance silicon-controlled rectifier for high-speed I/O ESD protection Ieee Electron Device Letters. 34: 178-180. DOI: 10.1109/Led.2012.2233708  0.721
2013 Cui Q, Liou JJ. Novel drain-less multi-gate pHEMT for electrostatic discharge (ESD) protection in GaAs technology Ieee International Reliability Physics Symposium Proceedings. DOI: 10.1109/IRPS.2013.6532073  0.35
2013 Liu Z, Dong A, Ji Z, Wang L, He L, Liang W, Miao J, Liou JJ. Evaluation of electrostatic discharge (ESD) characteristics for bottom contact organic thin film transistor 2013 Ieee International Conference of Electron Devices and Solid-State Circuits, Edssc 2013. DOI: 10.1109/EDSSC.2013.6628187  0.314
2013 Dong S, Zhong L, Zeng J, Guo W, Li H, Wang J, Guo Z, Liou JJ. Study of graphene field-effect transistors under electrostatic discharge stresses Electronics Letters. 49: 1086-1087. DOI: 10.1049/El.2013.1865  0.354
2013 Cui Q, Zhang S, Liou JJ. Novel ESD protection solution for single-ended mixer in GaAs pHEMT technology Microelectronics Reliability. 53: 952-955. DOI: 10.1016/J.Microrel.2013.03.013  0.396
2013 Ortiz-Conde A, García-Sánchez FJ, Muci J, Terán Barrios A, Liou JJ, Ho CS. Revisiting MOSFET threshold voltage extraction methods Microelectronics Reliability. 53: 90-104. DOI: 10.1016/J.Microrel.2012.09.015  0.416
2013 Zhou Y, Ellis D, Hajjar JJ, Olney A, Liou JJ. VfTLP-VTH: A new method for quantifying the effectiveness of ESD protection for the CDM classification test Microelectronics Reliability. 53: 196-204. DOI: 10.1016/J.Microrel.2012.04.011  0.491
2012 Malobabic S, Salcedo JA, Hajjar JJ, Liou JJ. NLDMOS ESD scaling under human metal model for 40-V mixed-signal applications Ieee Electron Device Letters. 33: 1595-1597. DOI: 10.1109/Led.2012.2213574  0.753
2012 Liu W, Liou JJ, Yeh HC, Wang H, Li Y, Yeo KS. Bidirectional diode-triggered silicon-controlled rectifiers for low-voltage ESD protection Ieee Electron Device Letters. 33: 1360-1362. DOI: 10.1109/Led.2012.2210384  0.483
2012 Dong S, Wu J, Miao M, Zeng J, Han Y, Liou JJ. High-holding-voltage silicon-controlled rectifier for ESD applications Ieee Electron Device Letters. 33: 1345-1347. DOI: 10.1109/LED.2012.2208934  0.347
2012 Miao M, Dong S, Wu J, Zeng J, Liou JJ, Ma F, Li H, Han Y. Minimizing multiple triggering effect in diode-triggered silicon-controlled rectifiers for ESD protection applications Ieee Electron Device Letters. 33: 893-895. DOI: 10.1109/LED.2012.2191930  0.377
2012 Salcedo JA, Hajjar JJ, Malobabic S, Liou JJ. Bidirectional devices for automotive-grade electrostatic discharge applications Ieee Electron Device Letters. 33: 860-862. DOI: 10.1109/Led.2012.2190261  0.728
2012 Dong S, Jin H, Miao M, Wu J, Liou JJ. Novel capacitance coupling complementary dual-direction SCR for high-voltage ESD Ieee Electron Device Letters. 33: 640-642. DOI: 10.1109/LED.2012.2188015  0.386
2012 Liou JJ, Cui Q. Novel Electrostatic Discharge (ESD) protection solution in GaAs pHEMT technology Proceedings of the International Symposium On the Physical and Failure Analysis of Integrated Circuits, Ipfa. DOI: 10.1109/IPFA.2012.6306333  0.394
2011 Liu W, Liou JJ, Singh N, Lo GQ, Chung J, Jeong YH. Electrostatic discharge (ESD) protection challenges of gate-all-around nanowire field-effect transistors Ecs Transactions. 34: 55-60. DOI: 10.1149/1.3567559  0.351
2011 Cui Q, Cheng CS, Liou JJ, Chiu HC. Development of a new pHEMT-based electrostatic discharge protection structure Ieee Transactions On Electron Devices. 58: 2974-2980. DOI: 10.1109/Ted.2011.2152843  0.508
2011 Malobabic S, Salcedo JA, Righter AW, Hajjar JJ, Liou JJ. Correlation of human metal model and transmission line pulsing testing Ieee Electron Device Letters. 32: 1200-1202. DOI: 10.1109/Led.2011.2160141  0.733
2011 Liu W, Liou JJ, Kuribara K, Fukuda K, Sekitani T, Someya T, Chung J, Jeong YH, Wang Z, Lin CL. Study of organic thin-film transistors under electrostatic discharge stresses Ieee Electron Device Letters. 32: 967-969. DOI: 10.1109/Led.2011.2142411  0.389
2011 Liu W, Liou JJ, Singh N, Lo GQ, Chung J, Jeong YH. Characterization and failure analysis of Sub-10 nm diameter, gate-all-around nanowire field-effect transistors subject to electrostatic discharge (ESD) Proceedings - International Nanoelectronics Conference, Inec. DOI: 10.1109/INEC.2011.5991616  0.356
2011 Jin H, Dong S, Miao M, Liou JJ, Yang CY. Breakdown voltage of ultrathin dielectric film subject to electrostatic discharge stress Journal of Applied Physics. 110: 54516. DOI: 10.1063/1.3633527  0.426
2011 García-Sánchez FJ, Latorre-Rey AD, Liu W, Chen WC, Lin HC, Liou JJ, Muci J, Ortiz-Conde A. A continuous semi-empiric transfer characteristics model for surrounding gate undoped polysilicon nanowire MOSFETs Solid-State Electronics. 63: 22-26. DOI: 10.1016/J.Sse.2011.05.004  0.453
2011 Liu X, Yuan JS, Liou JJ. Thermal reliability of VCO using InGaP/GaAs HBTs Microelectronics Reliability. 51: 2147-2152. DOI: 10.1016/J.Microrel.2011.07.019  0.399
2011 Chiu HC, Cheng CS, Kao HL, Fu JS, Cui Q, Liou JJ. A fully on-chip ESD protection UWB-band low noise amplifier using GaAs enhancement-mode dual-gate pHEMT technology Microelectronics Reliability. 51: 2137-2142. DOI: 10.1016/J.Microrel.2011.07.007  0.394
2011 Aliaj B, Vashchenko VA, Shibkov A, Liou JJ. Self-protection capability of integrated NLDMOS power arrays in ESD pulse regimes Microelectronics Reliability. 51: 2015-2030. DOI: 10.1016/J.Microrel.2011.05.017  0.392
2010 Liu W, Liou JJ, Jiang Y, Singh N, Lo GQ, Chung J, Jeong YH. Investigation of sub-10-nm diameter, gate-all-around nanowire field-effect transistors for electrostatic discharge applications Ieee Transactions On Nanotechnology. 9: 352-354. DOI: 10.1109/TNANO.2009.2038225  0.389
2010 Li Y, Liou JJ. Evaluation of transient behavior of polysilicon-bound diode for fast ESD applications Ieee Transactions On Electron Devices. 57: 2736-2743. DOI: 10.1109/Ted.2010.2063032  0.42
2010 Malobabic S, Salcedo JA, Hajjar JJ, Liou JJ. Analysis of safe operating area of NLDMOS and PLDMOS transistors subject to transient stresses Ieee Transactions On Electron Devices. 57: 2655-2663. DOI: 10.1109/Ted.2010.2058310  0.748
2010 Ellis DF, Zhou Y, Salcedo JA, Hajjar JJ, Liou JJ. Prediction and modeling of thin gate oxide breakdown subject to arbitrary transient stresses Ieee Transactions On Electron Devices. 57: 2296-2305. DOI: 10.1109/Ted.2010.2053864  0.721
2010 Li Y, Liou JJ, Vinson JE, Zhang L. Investigation of LOCOS- and polysilicon-bound diodes for robust electrostatic discharge (ESD) applications Ieee Transactions On Electron Devices. 57: 814-819. DOI: 10.1109/Ted.2009.2039964  0.43
2010 Li M, Dong S, Liou JJ, Song B, Han Y. A novel capacitance-coupling-triggered SCR for low-voltage ESD protection applications Ieee Electron Device Letters. 31: 1089-1091. DOI: 10.1109/LED.2010.2058844  0.329
2010 Liu W, Liou JJ, Jiang Y, Singh N, Lo GQ, Chung J, Jeong YH. Failure analysis of si nanowire field-effect transistors subject to electrostatic discharge stresses Ieee Electron Device Letters. 31: 915-917. DOI: 10.1109/Led.2010.2052911  0.425
2010 Liu Z, Liou JJ, Dong S, Han Y. Silicon-controlled rectifier stacking structure for high-voltage ESD protection applications Ieee Electron Device Letters. 31: 845-847. DOI: 10.1109/Led.2010.2050575  0.501
2010 Cui Q, Parthasarathy S, Salcedo JA, Liou JJ, Hajjar JJ, Zhou Y. Snapback and postsnapback saturation of pseudomorphic high-electron mobility transistor subject to transient overstress Ieee Electron Device Letters. 31: 425-427. DOI: 10.1109/Led.2010.2042029  0.734
2010 Huo MX, Han Y, Li Y, Song B, Liou JJ, Dong SR, Ding KB, Guo W, Huang D, Li M, Ma F, Miao M. Study of turn-on characteristics of SCRs for ESD protection with TDR-O and TDR-S TLPs Proceedings of the International Symposium On the Physical and Failure Analysis of Integrated Circuits, Ipfa. DOI: 10.1109/IPFA.2010.5532309  0.367
2010 Song B, Han Y, Li M, Liou JJ, Dong S, Guo W, Huang D, Ma F, Miao M. Design analysis of novel substrate-triggered GGNMOS in 65nm CMOS process Proceedings of the International Symposium On the Physical and Failure Analysis of Integrated Circuits, Ipfa. DOI: 10.1109/IPFA.2010.5532074  0.317
2010 Liu W, Liou JJ, Li Y, Chung J, Jeong YH. Evaluation of nanowire field-effect transistors for electrostatic discharge (ESD) applications Proceedings of the International Symposium On the Physical and Failure Analysis of Integrated Circuits, Ipfa. DOI: 10.1109/IPFA.2010.5532007  0.338
2010 Li Y, Liou JJ. Multiple-finger turn-on uniformity in silicon-controlled rectifiers Solid-State Electronics. 54: 1641-1643. DOI: 10.1016/J.Sse.2010.07.017  0.41
2010 Ortiz-Conde A, Latorre Rey AD, Liu W, Chen WC, Lin HC, Liou JJ, Muci J, García-Sánchez FJ. Parameter extraction in polysilicon nanowire MOSFETs using new double integration-based procedure Solid-State Electronics. 54: 635-641. DOI: 10.1016/J.Sse.2010.01.011  0.377
2010 Liu X, Yuan Js, Liou JJ. Electro-thermal stress effect on InGaP/GaAs heterojunction bipolar low-noise amplifier performance Microelectronics Reliability. 50: 365-369. DOI: 10.1016/J.Microrel.2009.12.007  0.385
2010 Ortiz-Conde A, García-Sánchez FJ, Liou JJ, Ho CS. Integration-based approach to evaluate the sub-threshold slope of MOSFETs Microelectronics Reliability. 50: 312-315. DOI: 10.1016/J.Microrel.2009.11.001  0.389
2010 Malobabic S, Salcedo JA, Righter AW, Hajjar JJ, Liou JJ. A new ESD design methodology for high voltage DMOS applications Electrical Overstress/Electrostatic Discharge Symposium Proceedings.  0.376
2010 Zhou Y, Hajjar JJ, Ellis DF, Olney AH, Liou JJ. A new method to evaluate effectiveness of CDM ESD protection Electrical Overstress/Electrostatic Discharge Symposium Proceedings.  0.39
2009 Liu W, Liou JJ, Chung A, Jeong Y, Chen W, Lin H. Electrostatic Discharge Robustness of Si Nanowire Field-Effect Transistors Ieee Electron Device Letters. 30: 969-971. DOI: 10.1109/Led.2009.2025610  0.468
2009 Muci J, Muñoz DCL, Rey ÁDL, Ortiz-Conde A, García-Sánchez FJ, Ho C, Liou JJ. A new integration-based procedure to separately extract series resistance and mobility degradation in MOSFETs Semiconductor Science and Technology. 24: 105015. DOI: 10.1088/0268-1242/24/10/105015  0.427
2009 Lou L, Liou JJ, Dong S, Han Y. Silicon controlled rectifier (SCR) compact modeling based on VBIC and Gummel–Poon models Solid-State Electronics. 53: 195-203. DOI: 10.1016/J.Sse.2008.11.007  0.449
2009 Ortiz-Conde A, García-Sánchez FJ, Muci J, Muñoz DCL, Rey ÁDL, Ho C, Liou JJ. Indirect fitting procedure to separate the effects of mobility degradation and source-and-drain resistance in MOSFET parameter extraction Microelectronics Reliability. 49: 689-692. DOI: 10.1016/J.Microrel.2009.05.005  0.371
2009 Wong H, Fu Y, Liou JJ, Yue Y. Hot-carrier reliability and breakdown characteristics of multi-finger RF MOS transistors Microelectronics Reliability. 49: 13-16. DOI: 10.1016/J.Microrel.2008.10.011  0.463
2009 Liou JJ, Malobabic S, Ellis DF, Salcedo JA, Hajjar JJ, Zhou Y. Transient safe operating area (TSOA) Definition for ESD applications Electrical Overstress/Electrostatic Discharge Symposium Proceedings.  0.416
2008 Liu Z, Liou JJ, Vinson J. Novel silicon-controlled rectifier (SCR) for high-voltage electrostatic discharge (ESD) applications Ieee Electron Device Letters. 29: 753-755. DOI: 10.1109/Led.2008.923711  0.464
2008 Liu Z, Vinson J, Lou L, Liou JJ. An Improved Bidirectional SCR Structure for Low-Triggering ESD Protection Applications Ieee Electron Device Letters. 29: 360-362. DOI: 10.1109/Led.2008.917111  0.519
2008 Salazar R, Ortiz-Conde A, García-Sánchez FJ, Ho C, Liou JJ. Evaluating MOSFET harmonic distortion by successive integration of the I–V characteristics Solid-State Electronics. 52: 1092-1098. DOI: 10.1016/J.Sse.2008.03.018  0.37
2008 Liu X, Yuan JS, Liou JJ. InGaP/GaAs heterojunction bipolar transistor and RF power amplifier reliability Microelectronics Reliability. 48: 1212-1215. DOI: 10.1016/J.Microrel.2008.06.009  0.381
2008 Li Y, Liou JJ, Vinson J. Investigation of diode geometry and metal line pattern for robust ESD protection applications Microelectronics Reliability. 48: 1660-1663. DOI: 10.1016/J.Microrel.2008.04.019  0.374
2008 Du X, Dong S, Han Y, Liou JJ, Huo M, Li Y, Cui Q, Huang D, Wang D. Evaluation of RF electrostatic discharge (ESD) protection in 0.18-μm CMOS technology Microelectronics Reliability. 48: 995-999. DOI: 10.1016/J.Microrel.2008.04.005  0.434
2007 Ortiz-Conde A, Garcia-Sanchez FJ, Muci J, Malobabic S, Liou JJ. A Review of Core Compact Models for Undoped Double-Gate SOI MOSFETs Ieee Transactions On Electron Devices. 54: 131-140. DOI: 10.1109/Ted.2006.887046  0.466
2007 Wu Y, Lin S, Chang T, Liou JJ. Nanoscale Bias-Annealing Effect in Postirradiated Thin Silicon Dioxide Films Observed by Conductive Atomic Force Microscopy Ieee Transactions On Device and Materials Reliability. 7: 351-355. DOI: 10.1109/Tdmr.2007.901069  0.312
2007 Lou L, Liou JJ. An unassisted, low trigger-, and high holding-voltage SCR (uSCR) for on-chip ESD-protection applications Ieee Electron Device Letters. 28: 1120-1122. DOI: 10.1109/Led.2007.909838  0.457
2007 Fu Y, Cheng X, Chen Y, Liou JJ, Shen ZJ. A 20-V CMOS-Based Monolithic Bidirectional Power Switch Ieee Electron Device Letters. 28: 174-176. DOI: 10.1109/Led.2006.889509  0.413
2007 Schwierz F, Liou JJ. RF transistors: Recent developments and roadmap toward terahertz applications Solid-State Electronics. 51: 1079-1091. DOI: 10.1016/J.Sse.2007.05.020  0.369
2006 Cui Z, Liou JJ, Yue Y, Wong H. A new approach to characterize and predict lifetime of deep-submicron nMOS devices International Journal of High Speed Electronics and Systems. 16: 315-323. DOI: 10.1142/S0129156406003667  0.754
2006 Salcedo JA, Liou JJ. A novel dual-polarity device with symmetrical/asymmetrical S-type I-V characteristics for ESD protection design Ieee Electron Device Letters. 27: 65-67. DOI: 10.1109/Led.2005.861601  0.456
2006 Ho CS, Lo YC, Chang YH, Liou JJ. Determination of gate-bias dependent source/drain series resistance and effective channel length for advanced MOS devices Solid-State Electronics. 50: 1774-1779. DOI: 10.1016/J.Sse.2006.09.005  0.433
2006 Ding H, Liou JJ, Cirba CR, Green K. An improved junction capacitance model for junction field-effect transistors Solid-State Electronics. 50: 1395-1399. DOI: 10.1016/J.Sse.2006.05.024  0.417
2006 Ding H, Liou JJ, Green K, Cirba CR. A new model for four-terminal junction field-effect transistors Solid-State Electronics. 50: 422-428. DOI: 10.1016/J.Sse.2006.01.001  0.426
2006 Wong H, Wong CK, Fu Y, Liou JJ. Characterization of oxide charge trapping in ultrathin N2O oxide using direct tunneling current Solid-State Electronics. 50: 170-176. DOI: 10.1016/J.Sse.2005.11.005  0.328
2006 Salcedo JA, Liou JJ, Afridi MY, Hefner AR. On-chip electrostatic discharge protection for CMOS gas sensor systems-on-a-chip (SoC) Microelectronics Reliability. 46: 1285-1294. DOI: 10.1016/J.Microrel.2005.12.002  0.353
2005 Cui Z, Liou JJ. A spice-like reliability model for deep-submicron CMOS technology Solid-State Electronics. 49: 1702-1707. DOI: 10.1016/J.Sse.2005.09.003  0.731
2005 Cui Z, Liou JJ, Yue Y, Wong H. Substrate current, gate current and lifetime prediction of deep-submicron nMOS devices Solid-State Electronics. 49: 505-511. DOI: 10.1016/J.Sse.2004.11.020  0.754
2005 Ho C, Huang K, Tang M, Liou JJ. An analytical threshold voltage model of NMOSFETs with hot-carrier induced interface charge effect Microelectronics Reliability. 45: 1144-1149. DOI: 10.1016/J.Microrel.2004.10.007  0.432
2004 Salcedo JA, Liou JJ, Bernier JC. Novel and robust silicon-controlled rectifier (SCR) based devices for on-chip ESD protection Ieee Electron Device Letters. 25: 658-660. DOI: 10.1109/Led.2004.834736  0.454
2004 Ho CS, Liou JJ, Chu G, Liu YC. A comprehensive and analytical drain current model for pocket-implanted NMOSFETs Solid-State Electronics. 48: 327-333. DOI: 10.1016/S0038-1101(03)00319-8  0.472
2003 Cui Z, Liou JJ, Yue Y. A new extrapolation method for long-term degradation prediction of deep-submicron MOSFETs Ieee Transactions On Electron Devices. 50: 1398-1401. DOI: 10.1109/Ted.2003.813473  0.669
2003 Liou JJ, Schwierz F. RF MOSFET: recent advances, current status and future trends Solid-State Electronics. 47: 1881-1895. DOI: 10.1016/S0038-1101(03)00225-9  0.407
2003 Cui Z, Liou JJ, Yue Y, Vinson J. Empirical reliability modeling for 0.18-μm MOS devices Solid-State Electronics. 47: 1515-1522. DOI: 10.1016/S0038-1101(03)00006-6  0.716
2003 Gao X, Liou JJ, Wong W, Vishwanathan S. An improved electrostatic discharge protection structure for reducing triggering voltage and parasitic capacitance Solid-State Electronics. 47: 1105-1110. DOI: 10.1016/S0038-1101(02)00486-0  0.708
2003 Gao X, Liou JJ, Bernier J, Croft G, Wong W, Vishwanathan S. Optimization of on-chip ESD protection structures for minimal parasitic capacitance Microelectronics Reliability. 43: 725-733. DOI: 10.1016/S0026-2714(03)00026-X  0.707
2002 Liou JJ, Zhang Q, McMacken J, Thomson JR, Stiles K, Layman P. Statistical Modeling of MOS Devices for Parametric Yield Prediction The Japan Society of Applied Physics. DOI: 10.7567/Ssdm.2002.A-2-3  0.409
2002 Gao XF, Liou JJ, Bernier J, Croft G, Ortiz-Conde A. Implementation of a comprehensive and robust MOSFET model in cadence SPICE for ESD applications Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 21: 1497-1502. DOI: 10.1109/Tcad.2002.804379  0.384
2002 Sanchez FJG, Ortiz-Conde A, Cerdeira A, Estrada M, Flandre D, Liou JJ. A method to extract mobility degradation and total series resistance of fully-depleted SOI MOSFETs Ieee Transactions On Electron Devices. 49: 82-88. DOI: 10.1109/16.974753  0.449
2002 Gao X, Liou JJ, Bernier J, Croft G. An improved model for substrate current of submicron MOSFETs Solid-State Electronics. 46: 1395-1398. DOI: 10.1016/S0038-1101(02)00088-6  0.733
2002 Gao XF, Liou JJ, Ortiz-Conde A, Bernier J, Croft G. A physics-based model for the substrate resistance of MOSFETs Solid-State Electronics. 46: 853-857. DOI: 10.1016/S0038-1101(01)00345-8  0.474
2002 Ortiz-Conde A, Sánchez FJG, Liou JJ, Cerdeira A, Estrada M, Yue Y. A review of recent MOSFET threshold voltage extraction methods Microelectronics Reliability. 42: 583-596. DOI: 10.1016/S0026-2714(02)00027-6  0.422
2002 Liou JJ, Zhang Q, McMacken J, Thomson JR, Stiles K, Layman P. Statistical modeling of MOS devices for parametric yield prediction Microelectronics Reliability. 42: 787-795. DOI: 10.1016/S0026-2714(01)00262-1  0.47
2002 Liou JJ, Shireen R, Ortiz-Conde A, Sánchez FJG, Cerdeira A, Gao X, Zou X, Ho CS. Influence of polysilicon-gate depletion on the subthreshold behavior of submicron MOSFETs Microelectronics Reliability. 42: 343-347. DOI: 10.1016/S0026-2714(01)00259-1  0.73
2001 Liou JJ, Schwierz F. Evolution and Current Status of RF Semiconductor Devices The Japan Society of Applied Physics. 2001: 74-75. DOI: 10.7567/Ssdm.2001.C-2-1  0.468
2001 Zhang Q, Liou JJ, McMacken J, Thomson J, Layman P. Modeling of mismatch effect in submicron MOSFETs based on BSIM3 model and parametric tests Ieee Electron Device Letters. 22: 133-135. DOI: 10.1109/55.910620  0.425
2001 Lee J, Young R, Liou JJ, Croft GD, Bernier JC. An improved experimental setup for electrostatic discharge (ESD) measurements based on transmission line pulsing technique Ieee Transactions On Instrumentation and Measurement. 50: 1808-1814. DOI: 10.1109/19.982985  0.413
2001 Zhang Q, Liou JJ, McMacken J, Thomson J, Layman P. Development of robust interconnect model based on design of experiments and multiobjective optimization Ieee Transactions On Electron Devices. 48: 1885-1891. DOI: 10.1109/16.944173  0.304
2001 Salcedo JA, Ortiz-Conde A, Sanchez EJG, Muci J, Liou JJ, Yue Y. New approach for defining the threshold voltage of MOSFETs Ieee Transactions On Electron Devices. 48: 809-813. DOI: 10.1109/16.915731  0.454
2001 Zhang Q, Liou JJ, McMacken J, Ross Thomson J, Stiles K, Layman P. Worst-case analysis and statistical simulation of MOSFET devices based on parametric test data Solid-State Electronics. 45: 1537-1547. DOI: 10.1016/S0038-1101(01)00177-0  0.409
2001 Tan Y, Liou JJ, Gessner J, Schwierz F. Analysis of reliability of AlGaAs/GaAs HBTs based on device simulation Solid-State Electronics. 45: 727-734. DOI: 10.1016/S0038-1101(01)00090-9  0.455
2001 Schwierz F, Liou JJ. Semiconductor devices for RF applications: evolution and current status Microelectronics Reliability. 41: 145-168. DOI: 10.1016/S0026-2714(00)00076-7  0.444
2001 Liou JJ, Huang CI. AlGaAs/GaAs heterojunction bipolar transistors for power applications: issues of thermal effect and reliability Microelectronics Journal. 32: 419-431. DOI: 10.1016/S0026-2692(01)00012-X  0.455
2000 Cao X, Mc Macken J, Stiles K, Layman P, Liou JJ, Ortiz-Conde A. Comparison of the new VBIC and conventional Gummel-Poon bipolar transistor models Ieee Transactions On Electron Devices. 47: 427-433. DOI: 10.1109/16.822290  0.377
2000 Zhou W, Liou JJ, Huang CI. A semi-empirical model for the AlGaAs/GaAs HBT long- term current instability Solid-State Electronics. 44: 541-548. DOI: 10.1016/S0038-1101(99)00255-5  0.436
2000 Sánchez FJG, Ortiz-Conde A, Mercato GD, Salcedo JA, Liou JJ, Yue Y. New simple procedure to determine the threshold voltage of MOSFETs Solid-State Electronics. 44: 673-675. DOI: 10.1016/S0038-1101(99)00254-3  0.409
2000 Ho CS, Liou JJ, Chen F. Analytical MOSFET breakdown model including self-heating effect Solid-State Electronics. 44: 125-131. DOI: 10.1016/S0038-1101(99)00198-7  0.365
2000 Lee JC, Hoque A, Croft GD, Liou JJ, Young R, Bernier JC. An electrostatic discharge failure mechanism in semiconductor devices, with applications to electrostatic discharge measurements using transmission line pulsing technique Solid-State Electronics. 44: 1771-1781. DOI: 10.1016/S0038-1101(00)00122-2  0.449
2000 Sánchez FJG, Ortiz-Conde A, Salcedo JA, Muci J, Estrada M, Cerdeira A, Liou JJ, Yue Y. Validation of bulk-charge effect parameter extraction in MOSFETs Microelectronics Reliability. 40: 941-945. DOI: 10.1016/S0026-2714(99)00274-7  0.435
1999 Sánchez FJG, Ortiz-Conde A, Salcedo JA, Liou JJ, Yue Y. A procedure for the extraction of the bulk-charge effect parameter in MOSFET models Solid-State Electronics. 43: 1295-1298. DOI: 10.1016/S0038-1101(99)00062-3  0.447
1999 Ortiz-Conde A, Ma Y, Thomson J, Santos E, Liou JJ, Sánchez FJG, Lei M, Finol J, Layman P. Direct extraction of semiconductor device parameters using lateral optimization method Solid-State Electronics. 43: 845-848. DOI: 10.1016/S0038-1101(99)00044-1  0.355
1999 Rezazadeh AA, Bashar SA, Sheng H, Amin FA, Khalid AH, Sotoodeh M, Crouch MA, Cattani L, Fantini F, Liou JJ. Reliability investigation of InGaP/GaAs HBTs under current and temperature stress Microelectronics Reliability. 39: 1809-1816. DOI: 10.1016/S0026-2714(99)00189-4  0.403
1999 Lee JC, Croft GD, Liou JJ, Young WR, Bernier J. Modeling and measurement approaches for electrostatic discharge in semiconductor devices and ICs: An overview Microelectronics Reliability. 39: 579-593. DOI: 10.1016/S0026-2714(99)00049-9  0.442
1999 Sánchez FJG, Ortiz-Conde A, Liou JJ. On the extraction of the source and drain series resistances of MOSFETs Microelectronics Reliability. 39: 1173-1184. DOI: 10.1016/S0026-2714(99)00028-1  0.374
1999 Xiao G, Lee J, Liou JJ, Ortiz-Conde A. Incomplete ionization in a semiconductor and its implications to device modeling Microelectronics Reliability. 39: 1299-1303. DOI: 10.1016/S0026-2714(99)00027-X  0.426
1998 Ortiz-Conde A, Rodrguez J, Sánchez FJG, Liou JJ. An improved definition for modeling the threshold voltage of MOSFETs Solid-State Electronics. 42: 1743-1746. DOI: 10.1016/S0038-1101(98)00138-5  0.411
1998 Ortiz-Conde A, Liou JJ, Sánchez FJG, Fernandes EG, Castillo OM, Hassan MDR, Mercato GD. A new method for extracting the effective channel length of MOSFETs Microelectronics Reliability. 38: 1867-1870. DOI: 10.1016/S0026-2714(98)00070-5  0.35
1998 Liou JJ. Long-term base current instability in AlGaAs/GaAs HBTs: physical mechanisms, modeling, and SPICE simulation Microelectronics Reliability. 38: 709-725. DOI: 10.1016/S0026-2714(98)00026-2  0.461
1998 Sheu S, Liou JJ, Huang CI. Numerical analysis on determining the physical mechanisms contributing to the abnormal base current in post-burn-in AlGaAs/GaAs HBTs Microelectronics Reliability. 38: 163-170. DOI: 10.1016/S0026-2714(97)00071-1  0.412
1997 Ortiz-Conde A, Gouveia Fernandas ED, Liou JJ, Hassan MR, García-Sánchez FJ, De Mercato G, Wong W. A new approach to extract the threshold voltage of mosfet's Ieee Transactions On Electron Devices. 44: 1523-1528. DOI: 10.1109/16.622610  0.433
1997 Latif Z, Ortiz-Conde A, Liou JJ, Sanchez FJG. A study of the validity of capacitance-based method for extracting the effective channel length of MOSFET's Ieee Transactions On Electron Devices. 44: 340-343. DOI: 10.1109/16.557729  0.326
1997 Liou JJ, Sheu SH. Failure mechanism and SPICE modeling of HBT long-term current instability Microelectronics Reliability. 37: 1643-1650. DOI: 10.1016/S0026-2714(97)00130-3  0.429
1996 Yue Y, Liou JJ, Ortiz-Conde A, Sanchez FG. A Comprehensive Study of High-Level Free-Carrier Injection in Bipolar Junction Transistors Japanese Journal of Applied Physics. 35: 3845-3851. DOI: 10.1143/Jjap.35.3845  0.358
1996 Liou JJ, Yue Y. An improved model for four-terminal junction field-effect transistors Ieee Transactions On Electron Devices. 43: 1309-1311. DOI: 10.1109/16.506786  0.493
1996 Liou JJ, Jenkins TJ, Liou LL, Neidhard R, Barlage DW, Fitch R, Barrette JP, Mack M, Bozada CA, Lee RHY, Dettmer RW, Sewell JS. Bias, frequency, and area dependencies of high frequency noise in AlGaAs/GaAs HBT's Ieee Transactions On Electron Devices. 43: 116-122. DOI: 10.1109/16.477601  0.306
1996 Sheu S, Liou JJ, Huang CI, Williamson DC. Modeling The Post-Burn-In Abnormal Base Current In Algaas/Gaas Heterojunction Bipolar Transistors Journal of Applied Physics. 79: 7348-7352. DOI: 10.1063/1.361451  0.437
1996 Zhou W, Sheu S, Liou JJ, Huang CI. Analysis of non-uniform current and temperature distributions in the emitter finger of AlGaAs/GaAs heterojunction bipolar transistors Solid-State Electronics. 39: 1709-1721. DOI: 10.1016/S0038-1101(96)00123-2  0.458
1996 Yue Y, Liou JJ, Batarseh I. An analytical insulated-gate bipolar transistor (IGBT) model for steady-state and transient applications under all free-carrier injection conditions Solid-State Electronics. 39: 1277-1282. DOI: 10.1016/0038-1101(96)00046-9  0.462
1996 Liou JJ, Sheu SH, Huang CI, Williamson DC. Bias and temperature dependencies of base and collector leakage currents of AlGaAsGaAs heterojunction bipolar transistors Solid-State Electronics. 39: 415-418. DOI: 10.1016/0038-1101(95)00224-3  0.389
1996 Yue Y, Liou JJ. Effects of incomplete ionization of impurity dopants on the performance of bipolar junction transistors Solid-State Electronics. 39: 318-320. DOI: 10.1016/0038-1101(95)00173-5  0.349
1996 Kager A, Liou JJ. Two-dimensional numerical analysis of AlGaAs/GaAs heterojunction bipolar transistors including the effects of graded layer, setback layer and self-heating Solid-State Electronics. 39: 193-199. DOI: 10.1016/0038-1101(95)00142-5  0.31
1996 Yue Y, Liou JJ, Ortiz-Conde A, Sanchez FG. Effects of high-level free-carrier injection on the base transit time of bipolar junction transistors Solid-State Electronics. 39: 27-31. DOI: 10.1016/0038-1101(95)00098-E  0.339
1995 Sanchez FJG, Ortiz-Conde A, Liou JJ. Calculating double-exponential diode model parameters from previously extracted single-exponential model parameters Electronics Letters. 31: 71-72. DOI: 10.1049/El:19950030  0.404
1995 Liou JJ, Ortiz-Conde A, Liou LL, Huang CI. Thermal-avalanche interacting behaviour of AlGaAs GaAs multi-emitter finger heterojunction bipolar transistors Solid State Electronics. 38: 1645-1648. DOI: 10.1016/0038-1101(95)00051-T  0.413
1995 Liou JJ, Ho CS. A physical model for the base transit time of advanced bipolar transistors Solid State Electronics. 38: 143-147. DOI: 10.1016/0038-1101(94)E0044-F  0.427
1995 Ho CS, Liou JJ, Parthasarathy A, Lin SF, Huang CI. Current transport in heterojunction bipolar transistors operating between 300 and 500 K Solid-State Electronics. 38: 1759-1763. DOI: 10.1016/0038-1101(94)00295-Q  0.407
1995 Kager A, Liou JJ, Huang CI. A numerical study of the effect of base and collector structures on the performance of {AlGaAs}/{GaAs} multi-finger HBTs Solid-State Electronics. 38: 1339-1346. DOI: 10.1016/0038-1101(94)00268-K  0.394
1995 Narayanan R, Ortiz-Conde A, Liou JJ, Sánchez FJG, Parthasarathy A. Two-dimensional numerical analysis for extracting the effective channel length of short-channel MOSFETs Solid-State Electronics. 38: 1155-1159. DOI: 10.1016/0038-1101(94)00231-4  0.367
1995 Liou JJ. An analytical model for the current transport of graded heterojunction bipolar transistors Solid State Electronics. 38: 946-948. DOI: 10.1016/0038-1101(94)00214-Z  0.363
1995 Liou JJ, Huang CI, Barrette J. A model to monitor the current gain long-term instability in AlGaAs/GaAs HBTs based on noise and leakage current characteristics Solid-State Electronics. 38: 761-765. DOI: 10.1016/0038-1101(94)00175-F  0.378
1995 Ho CS, Liou JJ, Chen DL, Liou LL, Huang CI. Combined effects of graded and setback layers on the AlGaAs GaAs HBT current-voltage characteristics Solid State Electronics. 38: 627-632. DOI: 10.1016/0038-1101(94)00158-C  0.419
1995 Ortiz-Conde A, Sánchez FJG, Liou JJ, Andrian J, Laurence RJ, Schmidt PE. A generalized model for a two-terminal device and its applications to parameter extraction Solid-State Electronics. 38: 265-266. DOI: 10.1016/0038-1101(94)00141-2  0.396
1994 Liou JJ, Huang CI, Bayraktaroglu B, Williamson DC, Parab KB. Base and collector leakage currents of AlGaAs/GaAs heterojunction bipolar transistors Journal of Applied Physics. 76: 3187-3193. DOI: 10.1063/1.357502  0.396
1994 Ortiz-Conde A, Liou JJ, Wong W, Garcia Sanchez FJ. Simple method for extracting the difference between the drain and source series resistances in MOSFETs Electronics Letters. 30: 1013-1015. DOI: 10.1049/El:19940681  0.302
1994 Liou JJ, Huang CI. Base and collector currents of pre- and post-burn-in AlGaAs/GaAs heterojunction bipolar transistors Solid State Electronics. 37: 1349-1352. DOI: 10.1016/0038-1101(94)90190-2  0.387
1994 Kager A, Liou JJ, Liou LL, Huang C. A semi-numerical model for multi-emitter finger AlGaAs/GaAs HBTs Solid State Electronics. 37: 1825-1832. DOI: 10.1016/0038-1101(94)90173-2  0.382
1994 Liou JJ, Ho CS, Kager A. Determination of the fitting parameters for using uniform emitter and base doping profile in bipolar transistor modeling Solid State Electronics. 37: 183-186. DOI: 10.1016/0038-1101(94)90124-4  0.352
1993 Liou JJ, Liou LL, Bayraktaroglu B, Huang CI. A Physics-Based, Analytical Heterojunction Bipolar Transistor Model Including Thermal and High-Current Effects Ieee Transactions On Electron Devices. 40: 1570-1577. DOI: 10.1109/16.231560  0.453
1993 Liou JJ, Liou LL, Huang CI, Bayraktaroglu B. Modeling the avalanche multiplication current of AlGaAs/GaAs heterojunction bipolar transistors Solid State Electronics. 36: 1217-1221. DOI: 10.1016/0038-1101(93)90204-4  0.436
1993 Liou JJ. Optimization of AlGaAs/GaAs heterojunction bipolar transistors for current gain, cutoff frequency and maximum frequency Solid State Electronics. 36: 1481-1491. DOI: 10.1016/0038-1101(93)90058-X  0.35
1993 Liou JJ, Ho CS, Liou LL, Huang CI. An analytical model for current transport in AlGaAs/GaAs abrupt HBTs with a setback layer Solid State Electronics. 36: 819-825. DOI: 10.1016/0038-1101(93)90003-9  0.349
1992 Wong WW, Liou JJ. Two-Dimensional Analysis of Ion-Implanted, Bipolar-Compatible, Long- and Short-Channel Junction Field-Effect Transistors Ieee Transactions On Electron Devices. 39: 2576-2583. DOI: 10.1109/16.163466  0.344
1992 Knapp SM, Malocha DC, Liou JJ. A Simplified and Efficient Numerical Model for Charge Injection in Acoustic Charge Transport Devices Ieee Transactions On Electron Devices. 39: 1811-1820. DOI: 10.1109/16.144669  0.414
1992 Liou JJ, Yuan JS, Shakouri H. Modulating the Bipolar Junction Transistor Subjected to Neutron Irradiation for Integrated Circuit Simulation Ieee Transactions On Electron Devices. 39: 593-597. DOI: 10.1109/16.123483  0.431
1992 Liou JJ, Wong WW. Comparison and optimization of the performance of Si and GaAs solar cells Solar Energy Materials and Solar Cells. 28: 9-28. DOI: 10.1016/0927-0248(92)90104-W  0.4
1992 Shih KM, Klemer DP, Liou JJ. Current-voltage characteristics of submicrom GaAs MESFETs with nonuniform channel doping profiles Solid State Electronics. 35: 1639-1644. DOI: 10.1016/0038-1101(92)90191-E  0.427
1992 Liou JJ. Effect of base grading on the Early voltage of HBTs Solid State Electronics. 35: 1378-1380. DOI: 10.1016/0038-1101(92)90176-D  0.373
1991 Yuan JS, Liou JJ. An Improved Early Voltage Model for Advanced Bipolar Transistors Ieee Transactions On Electron Devices. 38: 179-182. DOI: 10.1109/16.65753  0.482
1991 Wong WW, Liou JJ, Prentice J. A unified four-terminal JFET static model for circuit simulation Solid State Electronics. 34: 437-443. DOI: 10.1016/0038-1101(91)90147-Q  0.494
1990 Liou JJ. Comments on “Early Voltage in Very-Narrow-Base Bipolar Transistors” Ieee Electron Device Letters. 11: 236. DOI: 10.1109/55.55261  0.381
1990 Liou JJ, Yuan JS. Modeling the Reverse Base Current Phenomenon Due to Avalanche Effect in Advanced Bipolar Transistors Ieee Transactions On Electron Devices. 37: 2274-2276. DOI: 10.1109/16.59921  0.52
1990 Wong WW, Liou JJ, Prentice J. An Improved Junction Field-Effect Transistor Static Model for Integrated Circuit Simulation Ieee Transactions On Electron Devices. 37: 1773-1775. DOI: 10.1109/16.55768  0.459
1990 Liou JJ, Yuan JS, Wong WW. Effects of using the more accurate intrinsic concentration on bipolar transistor modeling Journal of Applied Physics. 68: 5911-5912. DOI: 10.1063/1.346942  0.348
1990 Liou JJ, Lee K, Knapp SM, Sundaram KB, Yuan JS, Malocha DC, Belkerdid M. A non-quasi-static small-signal model for metal-semiconductor junction diodes Solid State Electronics. 33: 1629-1632. DOI: 10.1016/0038-1101(90)90143-3  0.41
1990 Liou JJ, Wong WW, Yuan JS. A study of base built-in field effects on the steady-state current gain of heterojunction bipolar transistors Solid State Electronics. 33: 845-849. DOI: 10.1016/0038-1101(90)90064-L  0.454
1990 Liou JJ, Yuan JS. An avalanche multiplication model for bipolar transistors Solid State Electronics. 33: 35-38. DOI: 10.1016/0038-1101(90)90006-Z  0.379
1989 Liou JJ. Common-emitter current gain of AlxGa1-xAs/ GaAs/GaAs heterojunction bipolar transistors operating at small collector current Ieee Transactions On Electron Devices. 36: 1850-1852. DOI: 10.1109/16.34254  0.427
1989 Yuan JS, Liou JJ. Circuit modeling of transient emitter crowding and dynamic resistance effects for advanced bipolar transistors Solid State Electronics. 32: 623-631. DOI: 10.1016/0038-1101(89)90140-8  0.486
1988 Liou JJ. Comments on “A Compact Physical Large-Signal Model for High-Speed Bipolar Transistors at High Current Densities—Part I: One-Dimensional Model” Ieee Transactions On Electron Devices. 35: 1995-1996. DOI: 10.1109/16.7417  0.441
1988 Liou JJ, Lindholm FA, Malocha DC. Forward‐voltage capacitance of heterojunction space‐charge regions Journal of Applied Physics. 63: 5015-5022. DOI: 10.1063/1.340448  0.425
1988 Liou JJ. Non-quasi-static capacitance of p/n junction space-charge regions Solid State Electronics. 31: 81-86. DOI: 10.1016/0038-1101(88)90088-3  0.413
1988 Liou JJ, Brown HK, Clamme MS. Characterization of reverse recovery transient behavior of bipolar transistors for emitter parameters determination Solid-State Electronics. 31: 1595-1601. DOI: 10.1016/0038-1101(88)90006-8  0.368
1987 Liou JJ. Base-collector junction capacitance of bipolar transistors operating at high current densities Ieee Transactions On Electron Devices. 34: 2304-2308. DOI: 10.1109/T-Ed.1987.23236  0.425
1987 Liou JJ, Lindholm FA, Park JS. Forward-voltage capacitance and thickness of p-n junction space-charge regions Ieee Transactions On Electron Devices. 34: 1571-1579. DOI: 10.1109/T-Ed.1987.23121  0.466
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