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Yun-Shiang Shu, Ph.D. - Publications

Affiliations: 
2007 Electrical Engineering (Elec Circ and Sys) and Cog Sci University of California, San Diego, La Jolla, CA 
Area:
Electronics and Electrical Engineering
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4 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2016 Shu Y, Kuo L, Lo T. An Oversampling SAR ADC With DAC Mismatch Error Shaping Achieving 105 dB SFDR and 101 dB SNDR Over 1 kHz BW in 55 nm CMOS Ieee Journal of Solid-State Circuits. 51: 2928-2940. DOI: 10.1109/Jssc.2016.2592623  0.377
2010 Shu Y, Kamiishi J, Tomioka K, Hamashita K, Song B. LMS-Based Noise Leakage Calibration of Cascaded Continuous-Time $\Delta\Sigma$ Modulators Ieee Journal of Solid-State Circuits. 45: 368-379. DOI: 10.1109/Jssc.2009.2036759  0.426
2009 Shu YS, Kyung M, Lee WM, Song BS, Pain B. A 10∼15-bit 60-MS/s floating-point ADC with digital gain and offset calibration Ieee Journal of Solid-State Circuits. 44: 2356-2365. DOI: 10.1109/Jssc.2009.2022993  0.45
2008 Shu Y, Song B. A 15-bit Linear 20-MS/s Pipelined ADC Digitally Calibrated With Signal-Dependent Dithering Ieee Journal of Solid-State Circuits. 43: 342-350. DOI: 10.1109/Jssc.2007.914260  0.442
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