Stephen Goodnick - US grants

This proposal combines circuit design, material growth and characterization, and device test capabilities of Oregon State University with the industrial circuit fabrication facilities of TriQuint Semiconductor, Inc. to build and test high speed devices and circuits from strained pseudomorphic III-V ternary materials. InGaAs/GaAs and InGaAs/AlGaAs pseudomorphic HEMT structures will be grown by molecular beam epitaxy at OSU using a variety of structural parameters to optimize material properties. In particular, the investigators propose to grow ordered ternary material by growing binary superlattices; they will also grow both n- and p- channel material. The MBE material will be extensively characterized by optical and electrical measurements. The wafers will then be processed into a variety of test devices and integrated circuits at TriQuint at no cost to the National Science Foundation, after which the device and circuit performance will be fully tested and characterized using the facilities of both TriQuint and OSU. Based on the complete characterization new mask sets will then be designed at OSU and fabricated at Tektronix in order to optimize circuit performance.

Parallel algorithms for numerical models used in semiconductor device simulation of nonequilibrium transport in two dimensions using Monte Carlo particle methods. Such models are currently used and computed using vector serial computers. However, by adapting Monte Carlo to parallel systems, e.g. NCUBE or Sequent could result in substantial speedup and greatly enhance the scale and sophistication of such models. The methodology here will be to employ a general algorithmic analysis based on 'grain packing', a technique developed at the Oregon State University, in order to determine the optimal parti- tioning of the problem in a multi-processor systems. The research focuses on the parallel versus sequential speedup obtained through parallelization of existing sequential algo- rithms for bulk transport in GaAs and MESFET simulation using Monte Carlo methods.

9403744 Goodnick The International Workshop on Computational Electronics will be held at the Benson Hotel, Portland, Oregon on May 18, 19, and 20, 1993. The workshop will cover all aspects of advanced simulation of electronic transport in semiconductors and semiconductor devices, particularly those which use large computational resources. The major topics will include: 1) Advances in 2-D and 3-D standard simulations (drift- diffusion, hydrodynamic equations) 2) Particle simulation methods (Monte Carlo, molecular dynamics, cellular automaton) 3) Simulation of optical processes, optoelectronic and electro-optic devices (i.e. inclusion of Maxwell's equations) 4) Quantum transport quantum devices 5) High performance computing for computational electronics (parallelization, vectorization, improved numerical algorithms) The workshop is intended to be an international forum for the discussion on the current trends and the future directions of computational electronics. The emphasis of the contributions will be on interdisciplinary aspects of Computational Electronics, encompassing Applied Physics, Engineering and Applied Mathematics. Active participation of graduate students, including student poster papers, is strongly encouraged. The Workshop is scheduled a few days before the 1994 Microwave Theory and Techniques (MTT) Symposium, to facilitate attendance of international speakers to both events. ***

9312240 Goodnick This is a renewal project to continue the development of parallelized algorithms for semiconductor device simulation using particle methods. Improvements will be made to the prototype multiprocessor code PMC-3D to include state of the art physics such as full band structure effects, and generalize the code for a variety of different device technologies and arbitrary geometries. The codes will be developed in a high level parallel language (Dataparallel C) to increase their portability from machine to machine. Furthermore, full electromagnetic solutions rather than Poission's equation will be coupled in the particle-force calculation, in order to develop simulation tools for high frequency microwave and optoelectronic device applications. Parallel particle transport algorithms for semiconductor devices to include molecular dynamics and cellular automata techniques will developed. In the molecular dynamics case, hybrid particle-particle particle-mesh methods will be investigated to find efficient parallel algorithms which would greatly reduce the computational requirements of this technique. Parallel cellular automata device simulation algorithms in three dimensions will be developed and compared with Monte Carlo methods as a cost effective alternative to the latter technique. ***

9802596
Ferry
A Distributed Center for Advanced Electronics Simulation called DesCArtES will be established to address the needs of predictive physical models and computational tools for future generations of nanoelectronic and optoelectronic devices. The efforts will focus on several key research themes of highest priority, through the formation of a strong collaborative team linking four of the leading academic groups in Computational Electronics: the University of Illinois at Urbana-Champaign (acting as lead institution), Stanford University, Purdue University and Arizona State University. These groups have each their own strengths, and at the same time sufficient overlap of interests and a track record of collaboration, so that joint research efforts on the proposed themes can be effectively pursued.

The research themes include:

a) Continuum and Semi-Classical Simulation of Devices;
b) Optoelectronics Simulation;
c) Atomic-Scale Process Modeling for Nanoelectronics;
d) Quantum Transport in Nanoscale Devices.

The goals of this research consortium impact applications on a very large computational scale. While most of the development and testing can be conducted on typical workstations, realistic calculations, particularly in 3-D, will require considerable use of multiprocessor supercomputers. DesCArtES will have key interactions with many industrial laboratories, e.g. the National Center for Supercomputing Applications (NCSA) in Illinois, the Jet Propulsion Laboratory (JPL) and NASA Ames Research Center in California. Through the close relationship with these centers, the consortium will gain access to the high performance computational infrastructure necessary for the research efforts proposed. The collaboration with JPL and NASA also emphasizes goals that are new and in many ways complementary to the goals usually pursued in the industrial collaborations of this partnership. From the variety of collaborations as well as the interdisciplinary emphasis of some of the proposed research, the center will derive a well-rounded and creative perspective of new and important applications in Computational Electronics, thus creating the necessary environment to pursue successfully the proposed research themes.
***

9976484
Goodnick

Scaling of future semiconductor device technologies towards 0.1gm and below is placing new demands on semiconductor device simulation tools in terms of the physical models employed, and the computational demands of increased physical accuracy. At the same time, the exponential increase of semiconductor manufacture costs as device technology shrinks below this critical feature size mandates an increased dependence on simulation prior to manufacture. Important issues which will occur as devices continue to shrink include full three-dimensional geometry effects, new material systems, random dopant effects, discrete electron charging effects, and ultimately quantum mechanical effects at the smallest dimensions.
Herein is proposed funding for a three year program of research with the goal of developing the necessary device simulation tools to meet the challenges of device scaling along the projected Semiconductor Industry Association (SIA) roadmap and beyond with special attention given to the requirements of modularity, robustness and reliability. These device tools will employ full-band Cellular Automata and Monte Carlo particle-based techniques developed under previous NSF funding for efficient solution of the semi-classical Boltzmann transport equation and beyond. These techniques will be combined with robust field solvers based on multi-grid and Bi-conjugate gradient stabilized methods including non-uniform grids for arbitrary two- and three-dimensional device geometries. Discrete impurity effects and intercarrier interactions will be included in this simulation level through a coupled mesh/particle force model to assess the fluctuation in device operating characteristics based on random impurity distributions. Collaboration with industrial partners will be undertaken for comparison and calibration with state of the art device technologies. Due to the computational demands of 3D semi-classical modeling, the proposed research will be supported by investigation of high-performance computing environments based on multi-processor systems, and clusters of workstations. Distributed algorithms for both the transport simulation tools and the coupled field solvers will be developed and applied for high-end computing as developed under previous funding.
We will focus on comparison and calibration of the simulation tools with three particular technology areas in collaboration with industry and experimental groups, although the scope of the project goes far beyond these. One area involves EEPROM device technology, where 3D effects are prevalent, and where elevated electric fields necessitate full-band consideration as well. Another effort will focus on scaled Si MOS devices below 0.1 gm gate length, where a variety of new problems arise in terms of device scaling. Finally, we will consider newer material systems such as SOI and Si/SiGe technology, where little is known for example about hole transport, and improved transport models including full-band effects' are necessary.
***

0115548
Goodnick

The conventional approach to analyzing circuits and/or systems is to model the behavior in terms of lumped-parameter descriptions of the current-voltage relationships. Hence, device, circuit, and system modeling is often reduced to establishing the parameters that describe I-V characteristics of lumped circuit elements. However, present system operating frequencies characterized in terms of bandwidth and/or clock-speed are increasing at a rate analogous (and even faster) than Moore's law for integration density. As the operating frequency (or the clock speed) increases in circuits, one must treat the signals as electromagnetic waves propagating on transmission lines, rather than the simple voltages and currents. At even higher frequencies in the tera-hertz and far-infrared regime, one has to account for radiation absorption and emission including the interaction with the whole environment. This higher frequency regime is not only being approached from increasingly higher speed devices and circuits, but also from the optoelectronics side as long-wavelength sources and detectors are sought for new optical communication channels, as well as a variety special use applications such as sensing. This requires the development of new CAD tools that combines both electromagnetic theory and semiconductor device concepts. This approach is known as Global Modeling referring to its ability to model complete circuits using one unified scheme.

Herein is proposed funding for a three-year program of research with the goal of developing device and circuit simulation tools for accurate simulation of high frequency electronic circuits as well as long-wavelength optoelectronic systems. These semiconductor device tools will employ a full-band Cellular Automata/Monte Carlo particle-based techniques developed under previous NSF funding for efficient accurate physical solution of the semi-classical Boltzmann transport equation, coupled hierarchically with lower level models such as hydrodynamic solvers, and distributed transistor behavioral models. These techniques will be combined with robust field solvers based on full-wave solutions of Maxwell's equations using finite difference time domain (FDTD) techniques. The 3D solution of the coupled FDTD/Device problem is challenging from a computational standpoint, hence a large fraction of effort will address algorithmic improvements including parallelization in a distributed workstation environment.

The device/FDTD simulation kernel will be embedded in a larger simulation domain representing for example the passive elements and stripline coupling of the matching circuit for an amplifier. Comparison and calibration of the simulation tools will be performed in collaboration with industrial partners. High frequency scattering parameter measurements on devices obtained from industrial collaborators will be used to calibrate global simulation results using the above techniques. The PIs will focus on the modeling of high frequency amplifier technologies such as GaAs MESFET and HFET technology, as well as more advanced material systems such as SiGe HBTs and GaN field effect transistors. Consideration of thermal effects will be included as well for power amplifier applications. They will also apply the proposed simulation tool to the investigation of tera-hertz sources and detectors used for example in electro-optic sampling, where comparison will be made to ultrafast optical switching measurements

This proposal was received in response to the Spin Electronics for the 21st Century Initiative, Program Solicitation NSF 02-036. The proposal focuses on the application of semiconductor nanostructures in the emerging field of spin-based electronics. The program objectives are:

To explore demonstrations of the spintronic applications of nanostructures, including nanoscale implementations of the spin filter, the spin valve, and the spin transistor

To undertake experimental investigations of spin-polarized transport in semiconductor nanostructures

To perform theoretical studies of the spin-dependent electronic structure of semiconductor nanostructures, and of the mechanisms of spin decoherence.

The key outcome of this research is expected to be the development of a crucial understanding of the manner in which the unique properties of semiconductor nanostructures may be exploited in future spintronic devices. An important aspect of this program is its coordinated structure. The principal investigators have proven track records in the experimental and theoretical study of semiconductor nanostructures, and their collaboration is expected to result in a highly multidisciplinary interaction. The research program itself explores the implementation of complicated spintronic devices, such as the spin valve or the spin transistor, by integrating nanoscale implementations of the most basic of spin devices, the spin filter. Theoretical modeling explores the spin-resolved subband structure in these devices, the mechanisms for spin decoherence, and the transport properties of the structures being investigated.

In addition to its scientific importance, this program also contributes to the creation of a superior environment for graduate and undergraduate education at Arizona State University. Its pedagogic impact is further enhanced by the collaborations it promotes with researchers at national laboratories in the US (Sandia) and Japan (National Institute of Advanced Industrial Science and Technology, AIST). Graduate and undergraduate students involved in this project benefit greatly from the opportunities provided by these collaborations. A significant component of these collaborations, for example, is the opportunities they provide for student internship during this program. At the same time, undergraduate involvement in this program is encouraged by coordinating the research with the two-semester senior-design projects, which form one of the graduation requirements of the undergraduate program in the Electrical Engineering Department. As we have done in the past, we continue to make efforts to involve both underrepresented minorities and women in this program. A valuable opportunity for wider outreach is provided by the Women in Science and Engineering (WISE) program, which we have a record of involvement in and which actively encourages female high-school students to enter engineering programs. Dissemination of the results of this program is promoted through publications in the top peer-review journals, student and faculty participation in conferences, and the posting of related material on a central web resource that is being developed under an existing NSF-sponsored project.

The objective of this proposed workshop is to develop potential approaches for the introduction
of nanoscale engineering into the undergraduate and graduate engineering education process.
Recognizing that nanoscale engineering is a very interdisciplinary activity, the correct approach
to accomplish the education of future nanoelectronic engineers is not clear. The primary goal of
this effort is to hold a workshop with a collection of individuals well versed in the various
technologies that are necessary to accomplish advances in nanotechnology as well as individuals
that have been instrumental in developing roadmaps for new curricula. The attendees will be
primarily invited from the membership of the Electrical and Computer Engineering Department
Heads Association (ECEDHA). The co-located workshop will be held during the first two days
of the highly successful IEC DesignCon conference, taking place January 27-30, 2003.
DesignCon attracts more than 6,000 design engineers and managers and is also a draw for the
academic community. The proposed program plan is to hold a one-day tutorial on the general
topic of nanoscience and engineering that both the educators and the industrial participants of
IEC DesignCon can attend. The second day will be focused on the development of an
educational plan. The outcome of the workshop will be a report that outlines the possible
approaches that should be attempted to support the development of the undergraduate and
graduate nanoengineer. The workshop will be organized by ECEDHA, with board members
serving as the organizers and workshop hosts.
Intellectual Merit of the Proposed Activity: This workshop will bring together for the first time
educators in the general areas of Electrical and Computer Engineering with researchers in the
areas of Nanoscience and Engineering to address the critical issues of education and workforce
development relative to the emerging field of nanotechnology. This workshop will provide a
unique intellectual forum to identify problems and bottlenecks in educating engineering students
in this multidisciplinary arena.
Broader Impacts Resulting from the Proposed Activity: The proposed activity represents only the
first step in a broader program seeking to impact the engineering educational system in terms of
new and emerging areas of science and technology. Since nanoscience and engineering are
broadly interdisciplinary, the ideas relative to curriculum and education emerging from this
workshop are expected have much broader impact in approaches to multidisciplinary education
in other fields, such as information technology.

This Nanotechnology in Undergraduate Education (NUE) award to Arizona State University supports Dr. Ray W. Carpenter, Center for Solid State Science, along with colleagues Prof. Marilyn Carlson (applied mathematics and Science, Technology, Engineering and Mathematics (STEM) teaching methods), Prof. Jeff Drucker (Physics), Prof. Stephan Goodnick (Electrical Engineering), Prof. Vincent Pizziconi (Bioengineering), Dr. Andrew Chizmeshya (Physics), Dr. Michael McKelvy (Chemistry), Prof. B. L. Ramakrishna (Chemistry and Plant Biology), and Dr. Renu Sharma (Chemistry)to teach undergraduates, at three levels, the abstract concepts and properties dependence on length scales of nanoscience and engineering by leveraging existing cutting edge nanoscience and engineering research projects to produce teaching modules for undergraduate classes and opportunities for senior thesis projects. The levels of students who will be targeted in this program are: first year honors students, second year students who have completed calculus, and advanced undergraduates participating in senior projects.

The proposal for this award was received in response to the Nanoscale Science and Engineering Education announcement, NSF 03-44, category NUE and was jointly funded by the Division of Engineering Education and Centers (EEC) in the Directorate for Engineering (ENG), the Division of Materials Research (DMR) and the Division of Mathematical Sciences (DMS) both in the Directorate for Mathematical and Physical Sciences (MPS).

In response to significant interests in globalization, public policy, and engineering out-sourcing that emerged during the 2004 ECEDHA Annual Meeting, and which continued throughout the 2005 ECEDHA Annual Meeting, the Electrical and Computer Department Heads Association (ECEDHA) and The International Engineering Consortium (IEC) are proposing to organize a fall 2005 workshop that focuses on The Impact of Globalization on Electrical and Computer Engineering Curricula of the Future. The workshop will be held at the Constitution Avenue location of the National Academy of Engineering, Washington D. C, on November 14 and 15, 2005. The ECEDHA Board of Directors is grateful to Dr. William Wulf, President of the National Academy of Engineering (NAE), for making the NAE facilities available for this event. Dr. Ralph Cavin of the Semiconductor Research Corporation (SRC) has expressed an interest in the workshop on behalf of SRC, and it is anticipated that SRC will play a crucial role in representing the U.S. semiconductor industry's views on engineering education. Also, since ECEDHA has recently developed a new working relationship with the Computing Research Association (CRA), CRA will also participate in the workshop to represent their views on educational policy. Funds are requested in this proposal to provide partial travel support for invited workshop attendees and to cover basic administrative expenses for the fall 2005 workshop.
There is a growing need to educate engineering students for competitive careers in a global economy.
Educators need to carefully consider how to educate engineering students to prepare them for changes in a
profession that is becoming increasing influenced by globalization and outsourcing. Educators will also face
increasing challenges when recruiting students into ECE programs in the face of negative publicity on out-sourcing, and the perceived undercutting of the value of an engineering degree in the United States due to global competition. Another challenge to educators will be the retraining of engineering professionals in fields that have suffered from excessive out-sourcing. Addressing this challenge requires a new emphasis on continuing education to provide opportunities for engineers at all career levels to refresh and change the direction of their evolving careers. The proposed workshop will explore changes that are needed in engineering education and ECE curriculum to properly prepare graduates from United States institutions for careers in an economy where globalization and out-sourcing are predominant characteristics.
Although this proposal requests funding for the November 2005 workshop, the long range plan is for
ECEDHA and NSF to sponsor a series of three workshops in consecutive years from 2005 through 2007. The first (2005) workshop will focus on the discovery phase, with its goal being to analyze the effects of globalization on the Electrical and Computer Engineering profession, to propose ECE curriculum revisions designed to prepare students for further changes in the future, and to deal with issues involving the recruiting and retention of undergraduate students, graduate students, and young faculty in ECE. The role of ABET will be re-examined, and the workshop will seek to define changes needed in the ABET process to facilitate the creation curricula that prepare students to effectively deal with globalization of their profession. The second workshop (2006) will explore the implementation phase, in particular how ECE educators can bring about much needed curricula change in light of traditional program structures and increasing pressures to introduce emerging technologies into already crowded ECE curricula. The third workshop (2007) will focus on assessment and continual improvement of curricular revisions
that were identified and implemented in the two previous years. ECEDHA believes a three-year time window is the minimal period over which substantial changes can be made in ECE curricula in response to the globalization and outsourcing pressures that are already appear to be dominant forces in the profession. It is hoped that one of the outcomes of this three-year workshop series will be an increase in proposals submitted by ECE departments that will lead to major curricular revisions and eventually to overall department level reform across the nation.
Intellectual Merit: Intellectual merit of the proposed workshop centers on the urgency for ECE educators to
respond to the increasing pressures of globalization in the ECE profession, to provide opportunities for continuing education, and to motivate life-long learning in a rapidly changing ECE profession that is dominated by international issues.
Broader Impact: The broader impact of the proposed workshop is reflected in the international scope of the issues to be addressed at the workshop, and by the serious attention that the workshop will devote to recruiting, retaining, and mentoring undergraduate students, graduate students and young faculty, while drawing as much as possible from underrepresented groups in engineering (minorities and women in engineering).

The third Nano and Giga Challenges, titled "Symposium and School on Nano and Giga Challenges on Nanoelectronics and Photonics: From Atoms to Materials to Devices to System Architecture," will be held at Arizona State University from March 12-16, 2007. The first two days will consist of a series of tutorial lectures (Spring School) by internationally renowned scientists and university faculty. These lectures are targeted for graduate students and engineers and scientists not directly working in the field. The lectures will be complimented by hands-on training in ASU research laboratories and will be published in the Springer Nanoscience and Technology Series as was done after the first two meetings held in Moscow (NGCM2002) and Krakow (NGCM2004) respectively. Two journal issues and the book have been published after each meeting.

Funding is requested to support student participation at this conference. Several avenues have been created to promote student interest and involvement: A student paper contest has been set up to increase ASU and national-level student participation and awareness of Nanoscale technology issues. A poster session will offer students an opportunity to interface with scientists in their field of research. Students can serve as conference volunteers and part-time assistants (paid by conference grants provided to ASU by sponsors). In addition, students are also welcome to attend presentations during the symposium period of the conference. The conference will also provide employment networking opportunities both at the conference website and at the job fair in the exhibition area of the meeting.

Intellectual Merit
This conference aims to bring together academic and corporate scientists and engineers to enhance an exchange of ideas and to advance an understanding of the problems and potential areas of new solutions in nanotechnology for electronics and photonics, ranging from contemporary to advanced microelectronics to future molecular, bio and optoelectronics. The goal is to contribute to a fundamental understanding of specific nanoscale technology problems and approaches to help solve these technical challenges that provide the basis for today's information technology.

Broader Impact
The conference will make possible a gathering of leading scientists, engineers and managers from academia, national labs and industry to discuss new solutions in nanotechnology for electronics and photonics, ranging from contemporary to advanced microelectronics to future molecular, bio and optoelectronics. Additionally, students who participate in the conference will have an opportunity to network and collaborate with established researchers in the field of nanoelectronics and photonics. The NGC2007 meeting in Arizona will continue in the tradition of the two previous conferences of publishing tutorial lectures in the form of a book and the research papers in two or three journal issues. The meeting will also provide grounds to enhance business opportunities and international visibility of the local start-up companies. It will provide an effective opportunity for large companies to contribute in the development of the nanotech business infrastructure and education in Arizona as well.

The objective of this research is to develop signal processing algorithms for processing data from silicon ion-channel sensors to identify the presence of particular chemicals. Silicon ion-channel sensors are artificial cell membranes containing pore proteins, embedded in a silicon chip that measures current through the pores as the pores interact with target chemicals. This work will apply advanced signal processing techniques such as Hidden Markov, spectral subtraction and adaptive estimation of noise in the engineering of ion channels for explosive detection. The study leverages some existing prototypes to capture experimental data to build signal response databases. The PIs have a strong history of recruiting and mentoring minority and women students. The ion-channel efforts are to be included in undergraduate courses and in distance learning efforts.

This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).

0933838
Honsberg


The cost of solar cells must be reduced by a factor of two in order to achieve grid parity. There are a number of new technologies which can achieve this goal, including advanced silicon, thin film (CdTe or CIGS), organic solar cells, or, in the longer term, nanostructured photovoltaics. A commonality among these systems is the predominance of transport mechanisms across disordered/ordered interfaces that control the device performance. Existing modeling programs and approaches do not model such effects, requiring a particle-based approach such as Monte-Carlo modeling, which can accommodate hopping transport, recombination, and opto-electronic processes. In addition, the calculations are complicated by the long time scales required for photovoltaic applications, making a multiscale approach essential. The goal of this project is to develop a novel modeling approach to simulating and understanding materials and interfaces where ?hopping? transport controls the transport and recombination, and then experimentally verify and demonstrate the ability to match and predict behavior of novel solar cells. The research will optimize two specific experimental systems (a-Si/Si and organic/Si) and demonstrate the ability to achieve both transport and low recombination across such interfaces. Future goals are to use the tool for other solar cell approaches and materials.

The proposal has several scientific novelties as its intellectual merits. One scientific advance is the development of a multi-scale particle-based, Monte Carlo approach suitable for modeling disordered/ordered material interfaces. The improved understanding of these interfaces will be used to develop a match between simulated and experimental minority carrier lifetime curves of a-S/Si and organic/Si interfaces, and then develop optimized solar cells based on these interfaces. In addition to new models, the final scientific advances are to identify approaches to controlling the interface and demonstration of improved solar cells using this understanding, and allowing development of novel solar cell structures.

The project has substantial broader impacts. First, it addresses a limiting issue for a range of novel solar cell approaches, from existing commercial devices to novel nanostructured, organic or dye-sensitized devices, allowing new, higher efficiency and lower cost photovoltaic approaches. In addition, it will provide unique educational opportunities beyond the research training afforded to the graduate student involved with the project. The collaboration of different groups will be formalized through a class on photovoltaics, which combines the viewpoints and expertise of the different groups. The collaboration will result in a ?simplified? Monte Carlo simulator that allows visualization of the transport in such complex structures. It will be added to the existing photovoltaic educational website developed by the PIs, which attracts about 1,000 visits a day.

Project Summary
Since scaling of conventional semiconductor devices will ultimately reach its limits due to both high production cost and device reliability issues, alternatives to classical metal-oxide-semiconductor field effect transistors (MOSFETs) are being sought. There are two ways one can achieve enhanced device performance: (1) by using alternative materials such as strained-Si, SiGe, GaN, etc.; and (2) by using alternative device geometries.
Fully-depleted silicon on insulator (SOI), dual gate and FinFET devices are examples of al-ternative device technologies. Since the active silicon film in these structures is placed on top of a buried insulator layer, the power dissipation due to the substrate leakage current is eliminated. However, the buried oxide layer (which has a thermal conductivity about 100 times smaller than bulk Si) is a tremendous barrier to heat conduction, and degradation of the carrier mobility in the channel region of these devices occurs due to self-heating effects. In addition to silicon on insula-tor low power devices, heating is also a problem in high power wide-bandgap GaN HEMTs due to the large operation biases. The understanding of self-heating in these device structures can also shed light on their reliability, namely the phenomenon of current collapse due to the formation of cracks at the gate-drain end of the channel due to large electric fields and high lattice tempera-tures.
Therefore, the purpose of this project is to develop sophisticated particle-based device simu-lation tools that simultaneously take into account self-heating effects by solving the Boltzmann transport equations (BTEs) for both electrons and phonons, and considering quantum confine-ment effects for both the electrons and the phonons. Such a tool would be the most sophisticated simulator to date since electron and phonon transport is treated at the same physical level within the BTE.
The impact of this project is two-fold. (1) For low-power devices it allows for better device de-signs including the utilization of alternative buried insulator materials that may lead to better de-vice performance. This in turn can lead to new generations of CMOS devices. (2) Regarding the GaN HEMTs, if the problem of current collapse is understood and prevented, then these devices will have applications in the military and the automotive industry where both high-power, high temperature and high-frequency devices are being sought. Yet another important component of this project is that the students involved in the project will work on the state of the art research

This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).

This engineering education research award to Arizona State University will employ researchers to develop cyber infrastructure to infuse sustainability concepts into electrical engineering courses. A central challenge in incorporating sustainability in a greater range of engineering courses is the need to develop effective multidisciplinary and broad systems-based education models. In this research a gaming environment will be created as a learning tool to help students understand the complex interactions of multidisciplinary sustainability concepts. The research will also improve the process of on-line self-assessment through cognitive load theory and develop a problem-based learning database. This project has the potential to serve as a transformative educational model, offering a realistic mechanism by which sustainability can be included in a wide range of engineering classes. This research will increase student motivation, reduce barriers to collaborative multidisciplinary learning, and improve student learning outcomes. Sustainability is an increasingly significant societal issue, and it is important that engineering graduates understand and are able to apply sustainability principles in their engineering jobs.

The objective of this research is to explore individually addressable high density arrays of specialty diodes (p/n junction, Schottky, Zener, metal-semiconductor-metal and tunnel structures) made from vertical silicon and germanium nanowires grown with the vapor-liquid-solid method. It will study the diode performance and design interaction with the nanowire characteristics while addressing processing challenges. Arrays of such diodes have applications ranging from select devices for crosspoint memories to optical sensing and energy scavenging. The approach is based on bottom-up fabrication of vertical Si, Ge, and Si/Ge heterostructure nanowires grown with in-situ doping. It combines the seed and growth capabilities developed at the Los Alamos National Laboratory Center for Integrated Nanotechnologies with the wafer processing and device modeling, design, and testing expertise at Arizona State University.
The intellectual merits of this work lie in understanding the interactions between the growth process, the resulting physical junction, and the electrical behavior of the diode. Modeling of the transport characteristics of these nanowire diodes will be compared to experimental results such as the current voltage characteristics.
The broader impacts of this research lie in its educational component and the potential value to the electronics industry. The opportunity for the student to work with researchers at the Los Alamos National Laboratory Center for Integrated Nanotechnologies is especially valuable. Since the research is aimed at enabling the early introduction of nanowire devices into mainstream CMOS technology, there is a potentially large impact on an industry which is important to our national competitiveness and to society in general.

The proposed project will support student participation in the 2015 International Microwave Symposium (IMS) Educational Initiatives: Workshop Support, which will be held in Phoenix, Arizona, May 18-21, 2015. Support will be provided in conjunction with a new educational program called IMS Connect which was initiated in the 2014 IMS Symposium and will be expanded in this year's event. The proposed work will focus on STEM education and has as objective to increase the participation of students from underrepresented minorities. The participating students will share their experience with others through video diaries, helping to increase awareness of the opportunity for other students in future years. IMS will address research areas in RF/microwave engineering and is the largest conference in the world in this field. IMS has played a key role in identifying new directions for research and development. It is one of the few conferences where participation from both the industry and academia is extremely strong. The participating students will share their experience with others through video diaries, helping to increase awareness of the opportunity for other students in future years. The program will also be described in professional magazines with the potential to encourage other conferences to adopt a similar type of program.

Recent events have brought systemic racism and racial injustice in all facets of society into sharp focus. The Inclusive Engineering Consortium (IEC) recognizes the need and opportunity this has created to stimulate action on creating a more just and welcoming environment for underrepresented minorities in engineering education. We acknowledge that personal and institutional biases and inequitable practices affect underrepresented minorities, including faculty and students in electrical and computer engineering (ECE). IEC members are committed and compelled by our mission to make a stand together along with all academic institutions in treating everyone with equity and respect, regardless of race, religion, ethnicity, sex, gender identity or orientation, age, disability, citizen status, or national origin. Accordingly, we propose to deliver a series of capacity-building workshops during the first two quarters of 2021 that will 1) promote an understanding of these inequitable patterns and 2) introduce participants to frameworks that help to counter them. More specifically, we believe that these educational experiences will foster the ability to identify actionable steps to mitigate the deleterious effects of exclusion in engineering education, and facilitate collaboration across individuals and institutions in a way that begins to facilitate tangible change.

The IEC Social Justice Workshop Series will be organized before and after the 2021 Electrical and Computer Engineering Department Heads (ECEDHA) conference series in March 2021 in order to disseminate the results and recommendations to representatives of over 230 ECE departments across the US and Canada, and establish meaningful policies and programs to counter institutional bias in engineering. The workshop series takes a unique approach to addressing institutional bias in engineering education starting with a recently formed consortium of HBCU and HSI ECE programs (the IEC) to address first from their perspective the existing institutional gaps and barriers to underrepresented students and faculty in engineering, and from there develop a set of consistent and actionable recommendations that will be taken to a broader audience of ECE programs in the country (ECEDHA) for discussion and refinement, providing a guidebook, concrete policy changes and innovative programs that can be implemented in ECE departments. The successful implementation of meaningful changes in ECE programs to counter systemic racism will be broadly translatable to other engineering programs and STEM education where historically barriers exist to underrepresented students and faculty. The broader outcomes of such programs will be increased enrollment in STEM fields and increased diversity of the students and faculty to be more reflective of the overall population, leading to an increase in the domestic STEM workforce necessary to meet critical skill needs in the future economy.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.