Blanca L. Austin, Ph.D.
Affiliations: | 2001 | Georgia Institute of Technology, Atlanta, GA |
Area:
Microelectronics/MicrosystemsGoogle:
"Blanca Austin"Mean distance: 20.07
Parents
Sign in to add mentor| James D. Meindl | grad student | 2001 | Georgia Tech | |
| (Performance analysis and scaling opportunities of bulk CMOS inversion and accumulation devices.) | ||||
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Publications
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| Murali R, Austin BL, Wang L, et al. (2004) Short-channel modeling of bulk accumulation MOSFETs Ieee Transactions On Electron Devices. 51: 940-947 |
| Murali R, Austin BL, Wang L, et al. (2002) Scaled accumulation FETS for ultra-low power logic Proceedings of the Annual Ieee International Asic Conference and Exhibit. 2002: 371-375 |
| Murali R, Wang L, Austin BL, et al. (2002) Low-power circuit advantages of the scaled accumulation FET Proceedings - Ieee International Symposium On Circuits and Systems. 5: V/201-V/204 |
| Murali R, Austin BL, Meindl JD. (2002) A tick based methodology for rapid predictive circuit modeling Proceedings - Ieee International Symposium On Circuits and Systems. 3: III/791-III/794 |
| Bhavnagarwala AJ, Austin BL, Bowman KA, et al. (2000) A minimum total power methodology for projecting limits on CMOS GSI Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 8: 235-251 |
| Bhavnagarwala AJ, Austin B, Kapoor A, et al. (2000) CMOS system-on-a-chip voltage scaling beyond 50 nm Proceedings of the Ieee Great Lakes Symposium On Vlsi. 7-12 |
| Bowman KA, Austin BL, Eble JC, et al. (1999) Physical alpha-power law MOSFET model Ieee Journal of Solid-State Circuits. 34: 1410-1414 |
| Austin BL, Tang X, Meindl JD, et al. (1998) Threshold voltage roll-off model for low power bulk accumulation MOSFETs Proceedings of the Annual Ieee International Asic Conference and Exhibit. 175-179 |
| Bhavnagarwala AJ, Austin B, Meindl JD. (1998) Minimum supply voltage for bulk Si CMOS GSI Proceedings of the International Symposium On Low Power Electronics and Design, Digest of Technical Papers. [d]100-102 |
| Austin BL, Bowman KA, Tang X, et al. (1998) Low power transregional MOSFET model for complete power-delay analysis of CMOS gigascale integration (GSI) Proceedings of the Annual Ieee International Asic Conference and Exhibit. 125-129 |