☰

Chi On Chui, Ph.D. - Publications

Affiliations: 
Electrical Engineering University of California, Los Angeles, Los Angeles, CA 
 2004 Stanford University, Palo Alto, CA 
Area:
Semiconductor and electronic devices, integrated circuit manufacturing technology, bioelectronics and medical device technology, heterogeneous integration and exploratory nanotechnology
Tree Info Similar researchers PubMed Report error

76 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2019 Song L, Gao W, Chui CO, Rahmat-Samii Y. Wideband Frequency Reconfigurable Patch Antenna With Switchable Slots Based on Liquid Metal and 3-D Printed Microfluidics Ieee Transactions On Antennas and Propagation. 67: 2886-2895. DOI: 10.1109/Tap.2019.2902651  0.315
2017 Wang S, Pan A, Grezes C, Amiri PK, Wang KL, Chui CO, Gupta P. Leveraging nMOS Negative Differential Resistance for Low Power, High Reliability Magnetic Memory Ieee Transactions On Electron Devices. 64: 4084-4090. DOI: 10.1109/Ted.2017.2742500  0.317
2017 Wang S, Pan A, Chui CO, Gupta P. Tunneling Negative Differential Resistance-Assisted STT-RAM for Efficient Read and Write Operations Ieee Transactions On Electron Devices. 64: 121-129. DOI: 10.1109/Ted.2016.2631544  0.302
2016 Yang Y, Mao Y, Shin KS, Chui CO, Chiou PY. Self-Locking Optoelectronic Tweezers for Single-Cell and Microparticle Manipulation across a Large Area in High Conductivity Media. Scientific Reports. 6: 22630. PMID 26940301 DOI: 10.1038/Srep22630  0.314
2016 Wang S, Pan A, Chui CO, Gupta P. PROCEED: A Pareto Optimization-Based Circuit-Level Evaluator for Emerging Devices Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 24: 192-205. DOI: 10.1109/Tvlsi.2015.2393852  0.407
2015 Leung G, Wang S, Pan A, Gupta P, Chui CO. An Evaluation Framework for Nanotransfer Printing-Based Feature-Level Heterogeneous Integration in VLSI Circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. DOI: 10.1109/Tvlsi.2015.2477282  0.4
2015 Leung G, Pan A, Chui CO. Junctionless silicon and In0.53Ga0.47As transistors - Part II: Device variability from random dopant fluctuation Ieee Transactions On Electron Devices. 62: 3208-3214. DOI: 10.1109/Ted.2015.2464298  0.462
2015 Pan A, Leung G, Chui CO. Junctionless silicon and In0.53Ga0.47As transistors - Part I: Nominal device evaluation with quantum simulations Ieee Transactions On Electron Devices. 62: 3199-3207. DOI: 10.1109/Ted.2015.2464291  0.444
2015 Pan A, Chui CO. Gate-Induced Source Tunneling FET (GISTFET) Ieee Transactions On Electron Devices. 62: 2390-2395. DOI: 10.1109/Ted.2015.2445343  0.397
2015 Pan A, Chui CO. Modeling source-drain tunneling in ultimately scaled III-V transistors Applied Physics Letters. 106. DOI: 10.1063/1.4922840  0.365
2014 Shoorideh K, Chui CO. Understanding and optimization of the sensitivity of nanoscale FET-based biosensors Proceedings of Spie - the International Society For Optical Engineering. 9174. DOI: 10.1117/12.2064899  0.341
2014 Pan A, Chui CO. RF performance limits of ballistic Si field-effect transistors Sirf 2014 - 2014 Ieee 14th Topical Meeting On Silicon Monolithic Integrated Circuits in Rf Systems. 68-70. DOI: 10.1109/SiRF.2014.6828529  0.336
2014 Pan A, Chui CO. Modeling direct interband tunneling. II. Lower-dimensional structures Journal of Applied Physics. 116. DOI: 10.1063/1.4891528  0.32
2014 Pan A, Chui CO. Modeling direct interband tunneling. I. Bulk semiconductors Journal of Applied Physics. 116. DOI: 10.1063/1.4891527  0.347
2013 Narayanan P, Leuchtenburg M, Kina J, Joshi P, Panchapakeshan P, Chui CO, Andras Moritz C. Variability in nanoscale fabrics: Bottom-up integrated analysis and mitigation Acm Journal On Emerging Technologies in Computing Systems. 9. DOI: 10.1145/2422094.2422102  0.373
2013 Chui CO, Shin KS, Mao Y. Ultrasensitive biomolecular assays with amplifying nanowire FET biosensors Proceedings of Spie - the International Society For Optical Engineering. 8820. DOI: 10.1117/12.2026914  0.345
2013 Leung G, Chui CO. Interactions between line edge roughness and random Dopant fluctuation in Nonplanar field-effect transistor variability Ieee Transactions On Electron Devices. 60: 3277-3284. DOI: 10.1109/Ted.2013.2276072  0.356
2013 Pan A, Chen S, Chui CO. Electrostatic modeling and insights regarding multigate lateral tunneling transistors Ieee Transactions On Electron Devices. 60: 2712-2720. DOI: 10.1109/Ted.2013.2272040  0.421
2013 Wang S, Leung G, Pan A, Chui CO, Gupta P. Evaluation of digital circuit-level variability in inversion-mode and junctionless FinFET technologies Ieee Transactions On Electron Devices. 60: 2186-2193. DOI: 10.1109/Ted.2013.2264937  0.363
2013 Shih KH, Chui CO. Analog/RF performance and optimization of vertical III-V double-gate transistor Ieee Transactions On Electron Devices. 60: 1613-1618. DOI: 10.1109/Ted.2013.2252465  0.532
2013 Leung G, Chui CO. Stochastic variability in silicon double-gate lateral tunnel field-effect transistors Ieee Transactions On Electron Devices. 60: 84-91. DOI: 10.1109/Ted.2012.2226725  0.403
2013 Shih KH, Pan A, Liu Y, Chui CO. A systematic approach for hydrodynamic model calibration in the quasi-ballistic regime Solid-State Electronics. 87: 90-97. DOI: 10.1016/J.Sse.2013.06.003  0.566
2012 Chui CO, Shin KS, Kina J, Shih KH, Narayanan P, Andras Moritz C. Heterogeneous integration of epitaxial nanostructures - Strategies and application drivers Proceedings of Spie - the International Society For Optical Engineering. 8467. DOI: 10.1117/12.970438  0.616
2012 Narayanan P, Kina J, Panchapakeshan P, Chui CO, Moritz CA. Integrated device-fabric explorations and noise mitigation in nanoscale fabrics Ieee Transactions On Nanotechnology. 11: 687-700. DOI: 10.1109/Tnano.2012.2189413  0.373
2012 Shoorideh K, Chui CO. Optimization of the sensitivity of FET-based biosensors via biasing and surface charge engineering Ieee Transactions On Electron Devices. 59: 3104-3110. DOI: 10.1109/Ted.2012.2214221  0.301
2012 Leung G, Lai L, Gupta P, Chui CO. Device- and circuit-level variability caused by line edge roughness for sub-32-nm FinFET technologies Ieee Transactions On Electron Devices. 59: 2057-2063. DOI: 10.1109/Ted.2012.2199499  0.38
2012 Li L, Chui CO, He J, Chan M. One-time-programmable memory in LTPS TFT technology with metal-induced lateral crystallization Ieee Transactions On Electron Devices. 59: 145-150. DOI: 10.1109/Ted.2011.2171039  0.301
2012 Pan A, Chui CO. A quasi-analytical model for double-gate tunneling field-effect transistors Ieee Electron Device Letters. 33: 1468-1470. DOI: 10.1109/Led.2012.2208933  0.378
2012 Leung G, Chui CO. Variability impact of random dopant fluctuation on nanoscale junctionless FinFETs Ieee Electron Device Letters. 33: 767-769. DOI: 10.1109/Led.2012.2191931  0.36
2012 Li L, Zhang L, Lin X, He J, Chui CO, Chan M. Phase-change memory with multifin thin-film-transistor driver technology Ieee Electron Device Letters. 33: 405-407. DOI: 10.1109/Led.2011.2181480  0.319
2012 Shin K, Pan A, Chui CO. Channel length dependent sensitivity of Schottky contacted silicon nanowire field-effect transistor sensors Applied Physics Letters. 100: 123504. DOI: 10.1063/1.3696035  0.332
2012 Shin KS, Chui CO. Nanomanufacturing strategy for aligned assembly of nanowire arrays Journal of Electronic Materials. 41: 935-943. DOI: 10.1007/S11664-012-2058-X  0.4
2011 Kim J, Hong AJ, Kim SM, Shin KS, Song EB, Hwang Y, Xiu F, Galatsis K, Chui CO, Candler RN, Choi S, Moon JT, Wang KL. A stacked memory device on logic 3D technology for ultra-high-density data storage. Nanotechnology. 22: 254006. PMID 21572190 DOI: 10.1088/0957-4484/22/25/254006  0.321
2011 Chui CO, Shin KS. Integrated amplifying nanowire FET for surface and bulk sensing Proceedings of Spie - the International Society For Optical Engineering. 8106. DOI: 10.1117/12.896476  0.365
2011 Leung G, Chui CO. Variability of inversion-mode and junctionless finfets due to line edge roughness Ieee Electron Device Letters. 32: 1489-1491. DOI: 10.1109/Led.2011.2164233  0.383
2010 Shih KH, Chui CO. High mobility compound semiconductor permeable base transistors with suppressed base current Ecs Transactions. 33: 93-101. DOI: 10.1149/1.3485610  0.516
2010 Shin KS, Lee K, Park JH, Kang JY, Chui CO. Schottky contacted nanowire field-effect sensing device with intrinsic amplification Ieee Electron Device Letters. 31: 1317-1319. DOI: 10.1109/Led.2010.2070833  0.39
2008 Martens K, Chui CO, Brammertz G, De Jaeger B, Kuzum D, Meuris M, Heyns MM, Krishnamohan T, Saraswat K, Maes HE, Groeseneken G. On the correct extraction of interface trap density of MOS devices with high-mobility semiconductor substrates Ieee Transactions On Electron Devices. 55: 547-556. DOI: 10.1109/Ted.2007.912365  0.743
2008 Chen PT, Sun Y, Kim E, McIntyre PC, Tsai W, Garner M, Pianetta P, Nishi Y, Chui CO. HfO2 gate dielectric on (NH4)2S passivated (100) GaAs grown by atomic layer deposition Journal of Applied Physics. 103. DOI: 10.1063/1.2838471  0.37
2007 Choi D, Warusawithana M, Chui CO, Chen J, Tsai W, Schlom DG, Harris JS. The electrical characterization of molecular-beam-deposited LaA10 3 on gaas and its annealing effects Materials Research Society Symposium Proceedings. 996: 127-132. DOI: 10.1557/Proc-0996-H05-31  0.423
2006 McIntyre PC, Chi D, Chui CO, Kim H, Seo KI, Saraswat KC, Sreenivasan R, Sugawara T, Aguirre-Testado FS, Wallace RM. Interface layers for high-k/Ge gate stacks: Are they necessary? Ecs Transactions. 3: 519-530. DOI: 10.1149/1.2355849  0.549
2006 Saraswat KC, Chui CO, Kapur P, Krishnamohan T, Nayfeh A, Okyay AK, Shenoy RS. Performance limitations of Si CMOS and alternatives for nanoelectronics International Journal of High Speed Electronics and Systems. 16: 175-192. DOI: 10.1142/S0129156406003606  0.772
2006 Chui CO, Kim H, Chi D, Mcintyre PC, Saraswat KC. Nanoscale germanium MOS dielectrics - Part II: High-κ gate dielectrics Ieee Transactions On Electron Devices. 53: 1509-1516. DOI: 10.1109/Ted.2006.875812  0.712
2006 Chui CO, Ito F, Saraswat KC. Nanoscale germanium MOS dielectrics - Part I: Germanium oxynitrides Ieee Transactions On Electron Devices. 53: 1501-1508. DOI: 10.1109/Ted.2006.875808  0.612
2006 Lan H, Chen TW, Chui CO, Nikaeen P, Kim JW, Dutton RW. Synthesized compact models and experimental verifications for substrate noise coupling in mixed-signal ICs Ieee Journal of Solid-State Circuits. 41: 1817-1828. DOI: 10.1109/Jssc.2006.877272  0.341
2006 Saraswat KC, Chui CO, Kim D, Krishnamohan T, Pethe A. High mobility materials and novel device structures for high performance nanoscale MOSFETs Technical Digest - International Electron Devices Meeting, Iedm. DOI: 10.1109/IEDM.2006.346871  0.785
2006 Chui CO, Saraswat KC. Advanced germanium MOS devices and technology 2005 Ieee Conference On Electron Devices and Solid-State Circuits, Edssc. 101-106. DOI: 10.1109/EDSSC.2005.1635216  0.418
2006 Goel N, Majhi P, Chui CO, Tsai W, Choi D, Harris JS. InGaAs metal-oxide-semiconductor capacitors with HfO2 gate dielectric grown by atomic-layer deposition Applied Physics Letters. 89. DOI: 10.1063/1.2363959  0.422
2006 Okyay AK, Chui CO, Saraswat KC. Leakage suppression by asymmetric area electrodes in metal-semiconductor- metal photodetectors Applied Physics Letters. 88. DOI: 10.1063/1.2171648  0.681
2006 Saraswat K, Chui CO, Krishnamohan T, Kim D, Nayfeh A, Pethe A. High performance germanium MOSFETs Materials Science and Engineering B: Solid-State Materials For Advanced Technology. 135: 242-249. DOI: 10.1016/J.Mseb.2006.08.014  0.797
2005 Lu CH, Wong GMT, Deal MD, Tsai W, Majhi P, Chui CO, Visokay MR, Chambers JJ, Colombo L, Clemens BM, Nishi Y. Characteristics and mechanism of tunable work function gate electrodes using a bilayer metal structure on SiO2 and HfO2 Ieee Electron Device Letters. 26: 445-447. DOI: 10.1109/Led.2005.851232  0.36
2005 Nayfeh A, Chui CO, Yonehara T, Saraswat KC. Fabrication of high-quality p-MOSFET in Ge Grown heteroepitaxially on Si Ieee Electron Device Letters. 26: 311-313. DOI: 10.1109/Led.2005.846578  0.725
2005 Nayfeh A, Chui CO, Yonehara T, Saraswat KC. High mobility Ge pMOS fabricated using a novel heteroepitaxial Ge on Si growth method Device Research Conference - Conference Digest, Drc. 2005: 89-90. DOI: 10.1109/DRC.2005.1553069  0.615
2005 Okyay AK, Chui CO, Saraswat KC. A novel technique to reduce leakage in metal-semiconductor-metal photodetectors Device Research Conference - Conference Digest, Drc. 2005: 69-70. DOI: 10.1109/DRC.2005.1553059  0.631
2005 Chui CO, Kulig L, Moran J, Tsai W, Saraswat KC. Germanium n -type shallow junction activation dependences Applied Physics Letters. 87. DOI: 10.1063/1.2037861  0.518
2005 Chui CO, Lee DI, Singh AA, Pianetta PA, Saraswat KC. Zirconia-germanium interface photoemission spectroscopy using synchrotron radiation Journal of Applied Physics. 97. DOI: 10.1063/1.1922090  0.594
2005 Saraswat KC, Chui CO, Krishnamohan T, Nayfeh A, McIntyre P. Ge based high performance nanoscale MOSFETs Microelectronic Engineering. 80: 15-21. DOI: 10.1016/J.Mee.2005.04.038  0.803
2004 Saraswat KC, Chui CO, Krishnamohan T, Okyay AK, Kim H, McIntyre P. Ge and SiGe for High Performance MOSFETs and Integrated Optical Interconnects The Japan Society of Applied Physics. 2004: 718-719. DOI: 10.7567/Ssdm.2004.A-8-1  0.74
2004 Bakir MS, Chui CO, Okyay AK, Saraswat KC, Meindl JD. Integration of optical polymer pillars chip I/O interconnections with Si MSM photodetectors Ieee Transactions On Electron Devices. 51: 1084-1090. DOI: 10.1109/Ted.2004.830643  0.726
2004 Chui CO, Ito F, Saraswat KC. Scalability and electrical properties of germanium oxynitride MOS dielectrics Ieee Electron Device Letters. 25: 613-615. DOI: 10.1109/Led.2004.833830  0.603
2004 Chui CO, Kim H, McIntyre PC, Saraswat KC. Atomic layer deposition of high-κ dielectric for germanium MOS applications - substrate surface preparation Ieee Electron Device Letters. 25: 274-276. DOI: 10.1109/Led.2004.827285  0.703
2004 Nayfeh A, Chui CO, Saraswat KC, Yonehara T. Effects of hydrogen annealing on heteroepitaxial-Ge layers on Si: Surface roughness and electrical quality Proceedings - Electrochemical Society. 7: 1189-1192. DOI: 10.1063/1.1802381  0.695
2004 Kim H, McIntyre PC, Chui CO, Saraswat KC, Cho MH. Interfacial characteristics of HfO 2 grown on nitrided Ge (100) substrates by atomic-layer deposition Applied Physics Letters. 85: 2902-2904. DOI: 10.1063/1.1797564  0.681
2004 Kim H, McIntyre PC, Chui CO, Saraswat KC, Stemmer S. Engineering chemically abrupt high-k metal oxide/silicon interfaces using an oxygen-gettering metal overlayer Journal of Applied Physics. 96: 3467-3472. DOI: 10.1063/1.1776636  0.665
2004 Chi D, Chui CO, Saraswat KC, Triplett BB, Mclntyre PC. Zirconia grown by ultraviolet ozone oxidation on germanium (100) substrates Journal of Applied Physics. 96: 813-819. DOI: 10.1063/1.1745118  0.543
2004 Chui CO, Saraswat KC. Low thermal budget germanium MOS technology Proceedings - Electrochemical Society. 1: 396-405.  0.308
2004 Chui CO, Saraswat KC. Advanced germanium MOSFET technologies with high-κ gate dielectrics and shallow junctions 2004 International Conference On Integrated Circuit Design and Technology, Icicdt. 245-252.  0.352
2003 Chui CO, Okyay AK, Saraswat KC. Effective dark current suppression with asymmetric MSM photodetectors in group IV semiconductors Ieee Photonics Technology Letters. 15: 1585-1587. DOI: 10.1109/Lpt.2003.818683  0.669
2003 Chui CO, Kim H, McVittie JP, Triplett BB, McIntyre PC, Saraswat KC. A novel self-aligned gate-last MOSFET process comparing high-κ candidates 2003 International Semiconductor Device Research Symposium, Isdrs 2003 - Proceedings. 464-465. DOI: 10.1109/ISDRS.2003.1272191  0.623
2003 Chui CO, Gopalakrishnan K, Griffin PB, Plummer JD, Saraswat KC. Activation and diffusion studies of ion-implanted p and n dopants in germanium Applied Physics Letters. 83: 3275-3277. DOI: 10.1063/1.1618382  0.441
2003 Kim H, Chui CO, Saraswat KC, McIntyre PC. Local epitaxial growth of ZrO2 on Ge (100) substrates by atomic layer epitaxy Applied Physics Letters. 83: 2647-2649. DOI: 10.1063/1.1613031  0.676
2003 Okyay AK, Chui CO, Saraswat KC. Asymmetric group IV MSM photodetectors with reduced dark currents Osa Trends in Optics and Photonics Series. 88: 467-469.  0.561
2003 Chui CO, Kim H, McIntyre PC, Saraswat KC. A Germanium NMOSFET Process Integrating Metal Gate and Improved Hi-κ Dielectrics Technical Digest - International Electron Devices Meeting. 437-440.  0.327
2002 Chui CO, Ramanathan S, Triplett BB, McIntyre PC, Saraswat KC. Germanium MOS capacitors incorporating ultrathin high-κ gate dielectric Ieee Electron Device Letters. 23: 473-475. DOI: 10.1109/Led.2002.801319  0.599
2002 Chui CO, Ramanathan S, Triplett BB, McIntyre PC, Saraswat KC. Ultrathin high-κ gate dielectric technology for germanium MOS applications Device Research Conference - Conference Digest, Drc. 2002: 191-192. DOI: 10.1109/DRC.2002.1029595  0.367
2001 Chiang TY, Souri SJ, Chui CO, Saraswat KC. Thermal analysis of heterogeneous 3-D ICs with various integration scenarios Technical Digest - International Electron Devices Meeting. 681-684.  0.725
Show low-probability matches.