Chirag S. Patel, Ph.D. - Publications

Affiliations: 
2001 Georgia Institute of Technology, Atlanta, GA 
Area:
Microelectronics/Microsystems

68 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2011 Nagaraja S, Khaitan V, Jiang Y, Patel C, Meshkati F, Tokgoz Y, Yavuz M. Downlink transmit power calibration for enterprise femtocells Ieee Vehicular Technology Conference. DOI: 10.1109/VETECF.2011.6093268  1
2011 Patel C, Khaitan V, Nagaraja S, Meshkati F, Tokgoz Y, Yavuz M. Downlink interference management techniques for residential femtocells Ieee International Symposium On Personal, Indoor and Mobile Radio Communications, Pimrc. 117-121. DOI: 10.1109/PIMRC.2011.6139684  1
2010 Joshi G, Yavuz M, Patel C. Performance analysis of active handoff in CDMA2000 femtocells Proceedings of 16th National Conference On Communications, Ncc 2010. DOI: 10.1109/NCC.2010.5430219  1
2010 Patel C, Yavuz M, Nanda S. Femtocells Ieee Wireless Communications. 17: 6-7. DOI: 10.1109/MWC.2010.5601950  1
2009 Humblet P, Raghothaman B, Srinivas A, Balasubramanian S, Patel C, Yavuz M. System design of cdma2000 femtocells Ieee Communications Magazine. 47: 92-100. DOI: 10.1109/MCOM.2009.5277461  1
2009 Sakuma K, Andry PS, Tsang CK, Oyama Y, Patel CS, Sueoka K, Sprogis EJ, Knickerbocker JU. Die-to-wafer 3D integration technology for high yield and throughput Materials Research Society Symposium Proceedings. 1112: 201-210.  1
2008 Teague H, Patel C, Gore D, Sampath H, Naguib A, Kadous T, Gorokhov A, Agrawal A. Field results on MIMO performance in UMB systems Ieee Vehicular Technology Conference. 1009-1015. DOI: 10.1109/VETECS.2008.216  1
2008 Schow CL, Doany FE, Tsang C, Ruiz N, Kuchta D, Patel C, Horton R, Knickerbocker J, Kash J. 300-Gb/s, 24-channel full-duplex, 850-nm, cmos-based optical transceivers Ofc/Nfoec 2008 - 2008 Conference On Optical Fiber Communication/National Fiber Optic Engineers Conference. DOI: 10.1109/OFC.2008.4528354  1
2008 Kash JA, Doany FE, Schow CL, Budd R, Baks C, Kuchta DM, Pepeljugoski P, Schares L, Dangel R, Horst F, Offrein BJ, Tsang C, Ruiz N, Patel C, Horton R, et al. Terabus: Chip-to-chip board-level optical data buses Conference Proceedings - Lasers and Electro-Optics Society Annual Meeting-Leos. 515-516. DOI: 10.1109/LEOS.2008.4688718  1
2008 Dang B, Shih DY, Buchwalter S, Tsang C, Patel C, Knickerbocker J, Gruber P, Knickerbocker S, Garant J, Semkow K, Ruhmer K, Hughlett E. 50μm pitch Pb-free micro-bumps by C4NP technology Proceedings - Electronic Components and Technology Conference. 1505-1510. DOI: 10.1109/ECTC.2008.4550175  1
2008 Knickerbocker JU, Andry PS, Dang B, Horton RR, Patel CS, Polastre RJ, Sakuma K, Sprogis ES, Tsang CK, Webb BC, Wright SL. 3D silicon integration Proceedings - Electronic Components and Technology Conference. 538-543. DOI: 10.1109/ECTC.2008.4550025  1
2008 Doany FE, Schow CL, Tsang CK, Ruiz N, Horton R, Kuchta DM, Patel CS, Knickerbocker JU, Kash JA. 300-Gb/s 24-channel bidirectional Si carrier transceiver optochip for board-level interconnects Proceedings - Electronic Components and Technology Conference. 238-243. DOI: 10.1109/ECTC.2008.4549976  1
2008 Sakuma K, Andry PS, Tsang CK, Sueoka K, Oyama Y, Patel C, Dang B, Wright SL, Webb BC, Sprogis E, Polastre R, Horton R, Knickerbocker JU. Characterization of stacked die using die-to-wafer integration for high yield and throughput Proceedings - Electronic Components and Technology Conference. 18-23. DOI: 10.1109/ECTC.2008.4549944  1
2008 Dang B, Wright SL, Andry PS, Sprogis EJ, Tsang CK, Interrante MJ, Webb BC, Polastre RJ, Horton RR, Patel CS, Sharma A, Zheng J, Sakuma K, Knickerbocker JU. 3D chip stacking with C4 technology Ibm Journal of Research and Development. 52: 599-609.  1
2008 Knickerbocker JU, Andry PS, Dang B, Horton RR, Interrante MJ, Patel CS, Polastre RJ, Sakuma K, Sirdeshmukh R, Sprogis EJ, Sri-Jayantha SM, Stephens AM, Topol AW, Tsang CK, Webb BC, et al. Three-dimensional silicon integration Ibm Journal of Research and Development. 52: 553-569.  1
2008 Sakuma K, Andry PS, Tsang CK, Wright SL, Dang B, Patel CS, Webb BC, Maria J, Sprogis EJ, Kang SK, Polastre RJ, Horton RR, Knickerbocker JU. 3D chip-stacking technology with through-silicon vias and low-volume lead free interconnections Ibm Journal of Research and Development. 52: 611-622.  1
2007 Patel CS, Stüber GL. Channel estimation for amplify and forward relay based cooperation diversity systems Ieee Transactions On Wireless Communications. 6: 2348-2355. DOI: 10.1109/TWC.2007.05875  1
2007 Sakuma K, Andry PS, Dang B, Maria J, Tsang CK, Patel C, Wright SL, Webb B, Sprogis E, Kang SK, Polastre R, Horton R, Knickerbocker JU. 3D chip stacking technology with low-volume lead-free interconnections Proceedings - Electronic Components and Technology Conference. 627-632. DOI: 10.1109/ECTC.2007.373862  1
2007 Dang B, Wright SL, Andry PS, Tsang CK, Patel C, Polastre R, Horton R, Sakuma K, Webb BC, Sprogis E, Zhang G, Sharma A, Knickerbocker JU. Assembly, characterization, and reworkability of Pb-free ultra-fine pitch C4s for system-on-package Proceedings - Electronic Components and Technology Conference. 42-48. DOI: 10.1109/ECTC.2007.373774  1
2007 Hoivik N, Liu D, Jahnes CV, Cotte JM, Tsang C, Patel C, Pfeiffer U, Grzyb J, Knickerbocker J, Magerlein JH, Gaucher B. High-efficiency 60 GHz antenna fabricated using low-cost silicon micromachining techniques Ieee Antennas and Propagation Society, Ap-S International Symposium (Digest). 5043-5046. DOI: 10.1109/APS.2007.4396679  1
2007 Tsang CK, Andry PS, Sprogis EJ, Patel CS, Webb BC, Manzer DG, Knickerbocker JU. CMOS-compatible through silicon vias for 3D process integration Materials Research Society Symposium Proceedings. 970: 145-153.  1
2006 Patel CS. Silicon carrier for computer systems Proceedings - Design Automation Conference. 857-862. DOI: 10.1145/1146909.1147128  1
2006 Patel CS, Stüber GL, Pratt TG. Statistical properties of amplify and forward relay fading channels Ieee Transactions On Vehicular Technology. 55: 1-9. DOI: 10.1109/TVT.2005.861170  1
2006 Schares L, Kash JA, Doany FE, Schow CL, Schuster C, Kuchta DM, Pepeljugoski PK, Trewhella JM, Baks CW, John RA, Shan L, Kwark YH, Budd RA, Chiniwalla P, Libsch FR, ... ... Patel CS, et al. Terabus: Terabit/second-class card-level optical interconnect technologies Ieee Journal On Selected Topics in Quantum Electronics. 12: 1032-1043. DOI: 10.1109/JSTQE.2006.881906  1
2006 Knickerbocker JU, Patel CS, Andry PS, Tsang CK, Buchwalter LP, Sprogis EJ, Gan H, Horton RR, Polastre RJ, Wright SL, Cotte JM. 3-D silicon integration and silicon packaging technology using silicon through-vias Ieee Journal of Solid-State Circuits. 41: 1718-1724. DOI: 10.1109/JSSC.2006.877252  1
2006 Dang B, Bakir MS, Patel CS, Thacker HD, Meindl JD. Sea-of-Leads MEMS I/O interconnects for low-k IC packaging Journal of Microelectromechanical Systems. 15: 523-530. DOI: 10.1109/Jmems.2006.876792  1
2006 Patel CS, Yavuz M, Tokgoz Y. Handoff performance analysis for 1xEV-DO Rev. A systems Ieee International Conference On Communications. 11: 4924-4929. DOI: 10.1109/ICC.2006.255445  1
2006 Gan H, Wright SL, Polastre R, Buchwalter LP, Horton R, Andry PS, Patel C, Tsang C, Knickerbocker J, Sprogis E, Pavlova A, Kang SK, Lee KW. Pb-free micro-joints (50 μm pitch) for the next generation micro-systems: The fabrication, assembly and characterization Proceedings - Electronic Components and Technology Conference. 2006: 1210-1215. DOI: 10.1109/ECTC.2006.1645806  1
2006 Andry PS, Tsang C, Sprogis E, Patel C, Wright SL, Webb BC, Buchwalter LP, Manzer D, Horton R, Polastre R, Knickerbocker J. A CMOS-compatible process for fabricating electrical through-vias in silicon Proceedings - Electronic Components and Technology Conference. 2006: 831-837. DOI: 10.1109/ECTC.2006.1645754  1
2006 Wright SL, Polastre R, Gan H, Buchwalter LP, Horton R, Andry PS, Sprogis E, Patel C, Tsang C, Knickerbocker J, Lloyd JR, Sharma A, Sri-Jayantha MS. Characterization of micro-bump C4 interconnects for Si-carrier SOP applications Proceedings - Electronic Components and Technology Conference. 2006: 633-640. DOI: 10.1109/ECTC.2006.1645716  1
2006 Knickerbocker JU, Andry PS, Buchwalter LP, Colgan EG, Cotte J, Gan H, Horton RR, Sri-Jayantha SM, Magerlein JH, Manzer D, McVicker G, Patel CS, Polastre RJ, Sprogis ES, Tsang CK, et al. System-on-Package (SOP) technology, characterization and applications Proceedings - Electronic Components and Technology Conference. 2006: 415-421. DOI: 10.1109/ECTC.2006.1645680  1
2006 Kosta SP, Kosta YP, Patel V, Kosta S, Patel K, Patel P, Patel KM, Doshi P, Patel C, Jain R, Thaker M, Upadhyay N, Pandya K, MacWan J, Patel A, et al. Natural soil electronic active device diode International Journal of Electronics. 93: 589-611. DOI: 10.1080/00207210600748608  1
2006 Kash JA, Doany FE, Schares L, Schow CL, Schuster C, Kuchta DM, Pepeljugoski PK, Trewhella JM, Baks CW, John RA, Shan L, Kwark YH, Budd RA, Chiniwalla P, Libsch FR, ... ... Patel CS, et al. Chip-to-chip optical interconnects 2006 Optical Fiber Communication Conference, and the 2006 National Fiber Optic Engineers Conference. 2006.  1
2006 Patel CS, Tsang CK, Schuster C, Doany FE, Nyikal H, Baks CW, Budd R, Buchwalter LP, Andry PS, Canaperi DF, Edelstein DC, Horton R, Knickerbocker JU, Krywanczyk T, Kwark YH, et al. Silicon carrier with deep through-vias, fine pitch wiring, and through cavity for parallel optical transceiver Advanced Metallization Conference (Amc). 123-134.  1
2005 Patel CS, Stüber GL, Pratt TG. Simulation of Rayleigh-faded mobile-to-mobile communication channels Ieee Transactions On Communications. 53: 1876-1884. DOI: 10.1109/TCOMM.2005.858678  1
2005 Patel CS, Stüber GL, Pratt TG. Comparative analysis of statistical models for the simulation of Rayleigh faded cellular channels Ieee Transactions On Communications. 53: 1017-1026. DOI: 10.1109/TCOMM.2005.849735  1
2005 Kash JA, Doany F, Kuchta D, Pepeljugoski P, Schares L, Schaub J, Schow C, Trewhella J, Baks C, Kwark Y, Schuster C, Shan L, Patel C, Tsang C, Rosner J, et al. Terabus: A chip-to-chip parallel optical interconnect Conference Proceedings - Lasers and Electro-Optics Society Annual Meeting-Leos. 2005: 363-364. DOI: 10.1109/LEOS.2005.1548029  1
2005 Knickerbocker JU, Patel CS, Andry PS, Tsang CK, Paivikki Buchwalter L, Sprogis E, Gan H, Horton RR, Polastre R, Wright SL, Schuster C, Baks C, Doany F, Rosner J, Cordes S. Three dimensional silicon integration using fine pitch interconnection, silicon processing and silicon carrier packaging technology Proceedings of the Custom Integrated Circuits Conference. 2005: 654-657. DOI: 10.1109/CICC.2005.1568756  1
2005 Schares L, Schow C, Doany F, Schuster C, Kash J, Kuchta D, Pepeljugoski P, Schaub J, Trewhella J, Baks C, John R, Shan L, Hegde S, Kwark Y, Rogers D, ... ... Patel C, et al. "Terabus" - A waveguide-based parallel optical interconnect for Tb/s-class on-board data transfers in computer systems Iet Conference Publications. 2005: 369-372. DOI: 10.1049/cp:20050521  1
2005 Doany F, Kash J, Kuchta D, Pepeljugoski P, Schares L, Schaub J, Schow C, Trewhella J, Baks C, Kwark Y, Schuster C, Shan L, Patel C, Tsang C, Rosner J, et al. Terabus: A Waveguide-Based Parallel Optical Interconnect Optics Infobase Conference Papers 1
2005 Patel CS, Andry PS, Jenkins KA, Dang B, Horton R, Polastre RJ, Tsang CK. Characterization of flip chip microjoins up to 40 GHz using silicon carrier Proceedings of the Ieee 2005 International Interconnect Technology Conference, Iitc. 129-131.  1
2005 Jenkins KA, Patel CS. Copper-filled through wafer vias with very low inductance Proceedings of the Ieee 2005 International Interconnect Technology Conference, Iitc. 144-146.  1
2005 Knickerbocker JU, Andry PS, Buchwalter LP, Deutsch A, Horton RR, Jenkins KA, Kwark YH, McVicker G, Patel CS, Polastre RJ, Schuster C, Sharma A, Sri-Jayantha SM, Surovic CW, Tsang CK, et al. Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection Ibm Journal of Research and Development. 49: 725-753.  1
2004 Kosta SP, Patel V, Shukla G, Kosta S, Kosta YP, Patel A, Patel H, Kunthe P, Karsolia S, Patel KM, Patel KG, Patel C. Green biomass integrated electronic circuits International Journal of Electronics. 91: 587-597. DOI: 10.1080/00207210412331319065  1
2004 Patel CS, Stüber GL, Pratt TG. Analysis of OFDM/MC-CDMA under imperfect channel estimation and jamming 2004 Ieee Wireless Communications and Networking Conference, Wcnc 2004. 2: 954-958.  1
2004 Dang B, Patel C, Thacker H, Bakir M, Martin K, Meindl J. Optimal implementation of sea of leads (SoL) compliant interconnect technology Proceedings of the Ieee 2004 International Interconnect Technology Conference. 99-101.  1
2003 Keezer DC, Patel CS, Bakir MS, Zhou Q, Meindl JD. Electrical test strategies for a wafer-level packaging technology Ieee Transactions On Electronics Packaging Manufacturing. 26: 267-272. DOI: 10.1109/TEPM.2003.822063  1
2003 Bakir MS, Reed HA, Thacker HD, Patel CS, Kohl PA, Martin KP, Meindl JD. Sea of leads (SoL) ultrahigh density wafer-level chip input/output interconnections for gigascale integration (GSI) Ieee Transactions On Electron Devices. 50: 2039-2048. DOI: 10.1109/Ted.2003.816528  1
2003 Patel CS, Stüber GL, Pratt TG. Simulation of Rayleigh faded mobile-to-mobile communication channels Ieee Vehicular Technology Conference. 58: 163-167.  1
2002 Meindl JD, Davis JA, Zarkesh-Ha P, Patel CS, Martin KP, Kohl PA. Interconnect opportunities for gigascale integration Ibm Journal of Research and Development. 46: 245-263. DOI: 10.1147/Rd.462.0245  1
2002 Patel CS, Agraharam S, Martin K, Meindl J. Analysis of thermal management in the system assembly of high density chip size packages Proceedings of Spie - the International Society For Optical Engineering. 4217: 32-39.  1
2002 Patel CS, Power C, Realff M, Kohl PA, Martin KP, Meindl JD. Low cost high density compliant wafer level package Proceedings of Spie - the International Society For Optical Engineering. 4217: 261-268.  1
2001 Patel C, Martin KP, Meindl JD. Compliant Wafer Level Package American Society of Mechanical Engineers, Electronic and Photonic Packaging, Epp. 1: 53-61.  1
2001 Bakir MS, Patel CS, Kohl PA, Martin KP, Meindl JD. Ultra high I/O density package: Sea of leads (SoL) Proceedings of Spie - the International Society For Optical Engineering. 4428: 335-339.  1
2001 Patel CS, Martin K, Meindl JD. Electrical performance of compliant wafer level package Proceedings - Electronic Components and Technology Conference. 1380-1383.  1
2001 Li Y, Patel CS, Hess D, Martin K, Meindl J. Plasma processing of high density vias in compliant wafer level package Proceedings of Spie - the International Society For Optical Engineering. 4428: 285-291.  1
2001 Keezer DC, Patel CS, Zhou Q, Meindl JD. Electrical test strategies for a wafer-level batch packaging technology Proceedings - Electronic Components and Technology Conference. 1019-1023.  1
2001 Naeemi A, Patel CS, Bakir MS, Zarkesh-Ha P, Martin KP, Meindl JD. Sea of leads: A disruptive paradigm for a system-on-a-chip (SoC) Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 280-281.  1
2000 Patel CS, Agraharam S, Martin K, Meindl JD. Removing Heat from Wafer Level Packages Electronic Packaging and Production. 40: 40-49.  1
2000 Patel CS, Agraharam S, Martin K, Meindl JD. Thermal Management for High-Power Applications Electronic Packaging and Production. 40: 43-49.  1
2000 Patel CS, Agraharam S, Martin K, Meindl JD. Meeting the heat removal requirements of 'tiled' compliant wafer level packages Proceedings - Electronic Components and Technology Conference. 278-286.  1
2000 Patel CS, Realff M, Merriweather S, Power C, Martin K, Meindl JD. Cost analysis of compliant wafer level package Proceedings - Electronic Components and Technology Conference. 1634-1639.  1
2000 Naeemi A, Zarkesh-Ha P, Patel CS, Meindl JD. Performance improvement using on-board wires for on-chip interconnects Ieee Topical Meeting On Electrical Performance of Electronic Packaging. 325-328.  1
1999 Patel CS, Martin KP, Meindl JD. Optimal printed wiring board design for high I/O density chip size packages Circuit World. 25: 25-27.  1
1999 Patel CS, Ogitani S, Kohl P, Martin K, Meindl J. Analysis of the gap between PWB technology and chip I/O interconnect technology, and a new wafer-level batch packaging concept Proceedings of Spie - the International Society For Optical Engineering. 3906: 611-618.  1
1998 Tietbohl GL, Bell PM, Hamilton RM, Horner JB, Horton RL, Ludwigsen AP, Miller JL, Olson WH, Patel CS, Pennington DM, Vergino MD, Weiland TL. Engineering the Petawatt laser into Nova Proceedings of Spie - the International Society For Optical Engineering. 3264: 65-76. DOI: 10.1117/12.311901  1
1998 Patel CS, Chai SM, Yalamanchili S, Schimmel DE. Power/performance trade-offs for direct networks Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 1417: 231-244.  1
1997 Patel CS, Chai SM, Yalamanchili S, Schimmel DE. Power constrained design of multiprocessor interconnection networks Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 408-416.  1
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