| Year |
Citation |
Score |
| 2020 |
Liao Y, Pan C, Naeemi A. Benchmarking and Optimization of Spintronic Memory Arrays Ieee Journal On Exploratory Solid-State Computational Devices and Circuits. 6: 9-17. DOI: 10.1109/Jxcdc.2020.2999270 |
0.327 |
|
| 2020 |
Noor SL, Dens K, Reynaert P, Catthoor F, Lin D, Dorpe PV, Naeemi A. Modeling and Optimization of Plasmonic Detectors for Beyond-CMOS Plasmonic Majority Logic Gates Journal of Lightwave Technology. 38: 5092-5099. DOI: 10.1109/Jlt.2020.2998014 |
0.31 |
|
| 2020 |
Li X, Lin S, Dc M, Liao Y, Yao C, Naeemi A, Tsai W, Wang SX. Materials Requirements of High-Speed and Low-Power Spin-Orbit-Torque Magnetic Random-Access Memory Ieee Journal of the Electron Devices Society. 8: 674-680. DOI: 10.1109/Jeds.2020.2984610 |
0.301 |
|
| 2019 |
Lou Q, Pan C, McGuinness J, Horvath A, Naeemi A, Niemier M, Hu XS. A Mixed Signal Architecture for Convolutional Neural Networks Acm Journal On Emerging Technologies in Computing Systems. 15: 1-26. DOI: 10.1145/3304110 |
0.306 |
|
| 2019 |
Naeemi A. Special Topic on Ferroelectric Transistors for Advanced Logic, Analog, and Memory Applications Ieee Journal On Exploratory Solid-State Computational Devices and Circuits. 5: ii-iii. DOI: 10.1109/Jxcdc.2019.2960623 |
0.337 |
|
| 2019 |
Pan C, Lou Q, Niemier M, Hu S, Naeemi A. Energy-Efficient Convolutional Neural Network Based on Cellular Neural Network Using Beyond-CMOS Technologies Ieee Journal On Exploratory Solid-State Computational Devices and Circuits. 5: 85-93. DOI: 10.1109/Jxcdc.2019.2960307 |
0.344 |
|
| 2018 |
Pan C, Naeemi A. Transient Performance Analysis and Optimization of Crossbar Memory Arrays Using NbO2-Based Threshold Switching Selectors Ieee Transactions On Electron Devices. 65: 3214-3220. DOI: 10.1109/Ted.2018.2848844 |
0.312 |
|
| 2018 |
Hsu C, Pan C, Naeemi A. Performance Analysis and Enhancement of Negative Capacitance Logic Devices Based on Internally Resistive Ferroelectrics Ieee Electron Device Letters. 39: 765-768. DOI: 10.1109/Led.2018.2820118 |
0.332 |
|
| 2018 |
Pan C, Naeemi A. Complementary Logic Implementation for Antiferromagnet Field-Effect Transistors Ieee Journal On Exploratory Solid-State Computational Devices and Circuits. 4: 69-75. DOI: 10.1109/Jxcdc.2018.2878635 |
0.331 |
|
| 2017 |
Dutta S, Zografos O, Gurunarayanan S, Radu I, Soree B, Catthoor F, Naeemi A. Proposal for nanoscale cascaded plasmonic majority gates for non-Boolean computation. Scientific Reports. 7: 17866. PMID 29259222 DOI: 10.1038/S41598-017-17954-2 |
0.308 |
|
| 2017 |
Prasad D, Pan C, Naeemi A. Modeling Interconnect Variability at Advanced Technology Nodes and Potential Solutions Ieee Transactions On Electron Devices. 64: 1246-1253. DOI: 10.1109/Ted.2016.2645448 |
0.303 |
|
| 2017 |
Pan C, Naeemi A. An Expanded Benchmarking of Beyond-CMOS Devices Based on Boolean and Neuromorphic Representative Circuits Ieee Journal On Exploratory Solid-State Computational Devices and Circuits. 3: 101-110. DOI: 10.1109/Jxcdc.2018.2793536 |
0.322 |
|
| 2017 |
Mousavi Iraei R, Manipatruni S, Nikonov DE, Young IA, Naeemi A. Electrical-Spin Transduction for CMOS-Spintronic Interface and Long-Range Interconnects Ieee Journal On Exploratory Solid-State Computational Devices and Circuits. 3: 47-55. DOI: 10.1109/Jxcdc.2017.2706671 |
0.327 |
|
| 2016 |
Pan C, Naeemi A. A proposal for energy-efficient cellular neural network based on spintronic devices Ieee Transactions On Nanotechnology. 15: 820-827. DOI: 10.1109/Tnano.2016.2598147 |
0.355 |
|
| 2016 |
Aghasi H, Iraei RM, Naeemi A, Afshari E. Smart detector cell: A scalable all-spin circuit for low power non-boolean pattern recognition Ieee Transactions On Nanotechnology. 15: 356-366. DOI: 10.1109/Tnano.2016.2530779 |
0.315 |
|
| 2016 |
Kani N, Rakheja S, Naeemi A. A Probability-Density Function Approach to Capture the Stochastic Dynamics of the Nanomagnet and Impact on Circuit Performance Ieee Transactions On Electron Devices. 63: 4119-4126. DOI: 10.1109/Ted.2016.2594170 |
0.332 |
|
| 2016 |
Kumar V, Oh H, Zhang X, Zheng L, Bakir MS, Naeemi A. Impact of On-Chip Interconnect on the Performance of 3-D Integrated Circuits With Through Silicon Vias: Part I Ieee Transactions On Electron Devices. DOI: 10.1109/Ted.2016.2556693 |
0.594 |
|
| 2016 |
Zhang X, Kumar V, Oh H, Zheng L, May GS, Naeemi A, Bakir MS. Impact of On-Chip Interconnect on the Performance of 3-D Integrated Circuits with Through-Silicon Vias: Part II Ieee Transactions On Electron Devices. 63: 2510-2516. DOI: 10.1109/TED.2016.2556693 |
0.549 |
|
| 2016 |
Pan C, Naeemi A. Interconnect design and benchmarking for charge-based beyond-CMOS device proposals Ieee Electron Device Letters. 37: 508-511. DOI: 10.1109/Led.2016.2532350 |
0.337 |
|
| 2016 |
Pan C, Naeemi A. Non-Boolean Computing Benchmarking for Beyond-CMOS Devices Based on Cellular Neural Network Ieee Journal On Exploratory Solid-State Computational Devices and Circuits. 2: 36-43. DOI: 10.1109/Jxcdc.2016.2633251 |
0.332 |
|
| 2015 |
Prasad D, Ceyhan A, Pan C, Naeemi A. Adapting Interconnect Technology to Multigate Transistors for Optimum Performance Ieee Transactions On Electron Devices. 62: 3938-3944. DOI: 10.1109/Ted.2015.2487888 |
0.374 |
|
| 2015 |
Dutta S, Nikonov DE, Manipatruni S, Young IA, Naeemi A. Compact Physical Model for Crosstalk in Spin-Wave Interconnects Ieee Transactions On Electron Devices. 62: 3863-3869. DOI: 10.1109/Ted.2015.2478842 |
0.305 |
|
| 2015 |
Pan C, Raghavan P, Yakimets D, Debacker P, Catthoor F, Collaert N, Tokei Z, Verkest D, Thean AVY, Naeemi A. Technology/System Codesign and Benchmarking for Lateral and Vertical GAA Nanowire FETs at 5-nm Technology Node Ieee Transactions On Electron Devices. DOI: 10.1109/Ted.2015.2461457 |
0.327 |
|
| 2015 |
Pan C, Raghavan P, Ceyhan A, Catthoor F, Tokei Z, Naeemi A. Technology/circuit/system co-optimization and benchmarking for multilayer graphene interconnects at sub-10-nm technology node Ieee Transactions On Electron Devices. 62: 1530-1536. DOI: 10.1109/Ted.2015.2409875 |
0.329 |
|
| 2015 |
Ceyhan A, Jung M, Panth S, Lim SK, Naeemi A. Evaluating Chip-Level Impact of Cu/Low-κ Performance Degradation on Circuit Performance at Future Technology Nodes Ieee Transactions On Electron Devices. DOI: 10.1109/Ted.2015.2394407 |
0.38 |
|
| 2015 |
Pan C, Naeemi A. A paradigm shift in local interconnect technology design in the era of nanoscale multigate and gate-all-around devices Ieee Electron Device Letters. 36: 274-276. DOI: 10.1109/Led.2015.2394366 |
0.367 |
|
| 2015 |
Chang SC, Dutta S, Manipatruni S, Nikonov DE, Young IA, Naeemi A. Interconnects for All-Spin Logic Using Automotion of Domain Walls Ieee Journal On Exploratory Solid-State Computational Devices and Circuits. 1: 49-57. DOI: 10.1109/Jxcdc.2015.2448415 |
0.331 |
|
| 2015 |
Pan C, Naeemi A. A fast system-level design methodology for heterogeneous multi-core processors using emerging technologies Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 5: 75-87. DOI: 10.1109/Jetcas.2015.2398218 |
0.406 |
|
| 2014 |
Kumar V, Sharma R, Uzunlar E, Zheng L, Bashirullah R, Kohl P, Bakir MS, Naeemi A. Airgap interconnects: Modeling, optimization, and benchmarking for backplane, PCB, and interposer applications Ieee Transactions On Components, Packaging and Manufacturing Technology. 4: 1335-1346. DOI: 10.1109/Tcpmt.2014.2326798 |
0.563 |
|
| 2014 |
Pan C, Naeemi A. A proposal for a novel hybrid interconnect technology for the end of roadmap Ieee Electron Device Letters. 35: 250-252. DOI: 10.1109/Led.2013.2291783 |
0.319 |
|
| 2013 |
Ceyhan A, Naeemi A. Cu/Low-k interconnect technology design and benchmarking for future technology nodes Ieee Transactions On Electron Devices. 60: 4041-4047. DOI: 10.1109/Ted.2013.2286176 |
0.348 |
|
| 2013 |
Ceyhan A, Naeemi A. Cu interconnect limitations and opportunities for SWNT interconnects at the end of the roadmap Ieee Transactions On Electron Devices. 60: 374-382. DOI: 10.1109/Ted.2012.2224663 |
0.377 |
|
| 2013 |
Rakheja S, Naeemi A. Communicating novel computational state variables: Post-CMOS logic Ieee Nanotechnology Magazine. 7: 15-23. DOI: 10.1109/Mnano.2012.2237314 |
0.311 |
|
| 2013 |
Zheng P, Bryan SE, Yang Y, Murali R, Naeemi A, Meindl JD. Hydrogenation of graphene nanoribbon edges: Improvement in carrier transport Ieee Electron Device Letters. 34: 707-709. DOI: 10.1109/Led.2013.2253593 |
0.633 |
|
| 2013 |
Kumar V, Zheng L, Bakir M, Naeemi A. Compact modeling and optimization of fine-pitch interconnects for silicon interposers Proceedings of the 2013 Ieee International Interconnect Technology Conference, Iitc 2013. DOI: 10.1109/IITC.2013.6615571 |
0.557 |
|
| 2012 |
Rakheja S, Naeemi A. Graphene nanoribbon spin interconnects for nonlocal spin-torque circuits: Comparison of performance and energy per bit with CMOS interconnects Ieee Transactions On Electron Devices. 59: 51-59. DOI: 10.1109/Ted.2011.2171186 |
0.327 |
|
| 2012 |
Huang G, Bakir MS, Naeemi A, Meindl JD. Power delivery for 3-D chip stacks: Physical modeling and design implication Ieee Transactions On Components, Packaging and Manufacturing Technology. 2: 852-859. DOI: 10.1109/Tcpmt.2012.2185047 |
0.732 |
|
| 2011 |
Jamal O, Naeemi A. Ultralow-power single-wall carbon nanotube interconnects for subthreshold circuits Ieee Transactions On Nanotechnology. 10: 99-101. DOI: 10.1109/Tnano.2010.2095428 |
0.377 |
|
| 2011 |
Balakrishnan A, Naeemi A. Interconnect network analysis of many-core chips Ieee Transactions On Electron Devices. 58: 2831-2837. DOI: 10.1109/Ted.2011.2158104 |
0.309 |
|
| 2011 |
Rakheja S, Naeemi A. Modeling interconnects for post-CMOS devices and comparison with copper interconnects Ieee Transactions On Electron Devices. 58: 1319-1328. DOI: 10.1109/Ted.2011.2109004 |
0.349 |
|
| 2010 |
Rakheja S, Naeemi A. Interconnects for novel state variables: Performance modeling and device and circuit implications Ieee Transactions On Electron Devices. 57: 2711-2718. DOI: 10.1109/Ted.2010.2062186 |
0.336 |
|
| 2010 |
Balakrishnan A, Naeemi A. Optimal global interconnects for networks-on-chip in many-core architectures Ieee Electron Device Letters. 31: 290-292. DOI: 10.1109/Led.2010.2041319 |
0.383 |
|
| 2010 |
Meindl J, Naeemi A, Bakir M, Murali R. Nanoelectronics in retrospect, prospect and principle Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 53: 31-35. DOI: 10.1109/ISSCC.2010.5434062 |
0.684 |
|
| 2010 |
Rakheja S, Naeemi A, Meindl JD. Physical limitations on delay and energy dissipation of interconnects for post-CMOS devices 2010 Ieee International Interconnect Technology Conference, Iitc 2010. DOI: 10.1109/IITC.2010.5510448 |
0.483 |
|
| 2009 |
Naeemi A, Meindl JD. Carbon nanotube interconnects Annual Review of Materials Research. 39: 255-275. DOI: 10.1146/Annurev-Matsci-082908-145247 |
0.526 |
|
| 2009 |
Naeemi A, Meindl JD. Compact physics-based circuit models for graphene nanoribbon interconnects Ieee Transactions On Electron Devices. 56: 1822-1833. DOI: 10.1109/Ted.2009.2026122 |
0.557 |
|
| 2008 |
Naeemi A, Meindl JD. Performance modeling for single- and multiwall carbon nanotubes as signal and power interconnects in gigascale systems Ieee Transactions On Electron Devices. 55: 2574-2582. DOI: 10.1109/Ted.2008.2003028 |
0.575 |
|
| 2008 |
Naeemi A, Meindl JD. Electron transport modeling for junctions of zigzag and armchair graphene nanoribbons (GNRs) Ieee Electron Device Letters. 29: 497-499. DOI: 10.1109/Led.2008.920278 |
0.516 |
|
| 2008 |
Naeemi A, Meindl JD. Performance benchmarking for graphene nanoribbon, carbon Nanotube, and Cu interconnects 2008 Ieee International Interconnect Technology Conference, Iitc. 183-185. DOI: 10.1109/IITC.2008.4546961 |
0.472 |
|
| 2008 |
Naeemi A, Meindl JD. Physical models for electron transport in graphene nanoribbons and their junctions Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 400-405. DOI: 10.1109/ICCAD.2008.4681605 |
0.442 |
|
| 2008 |
Huang G, Naeemi A, Zhou T, O'Connor D, Muszynski A, Singh B, Becker D, Venuto J, Meindl JD. Compact physical models for chip and package power and ground distribution networks for gigascale integration (GSI) Proceedings - Electronic Components and Technology Conference. 646-651. DOI: 10.1109/ECTC.2008.4550040 |
0.544 |
|
| 2008 |
Bakir MS, King C, Sekar D, Thacker H, Dang B, Huang G, Naeemi A, Meindl JD. 3D heterogeneous integrated systems: Liquid cooling, power delivery, and implementation Proceedings of the Custom Integrated Circuits Conference. 663-670. DOI: 10.1109/CICC.2008.4672173 |
0.75 |
|
| 2008 |
Huang G, Sekar D, Naeemi A, Shakeri K, Meindl JD. Physical model for power supply noise and chip/package co-design in gigascale systems with the consideration of hot spots Proceedings of the Custom Integrated Circuits Conference. 841-844. DOI: 10.1109/CICC.2007.4405859 |
0.764 |
|
| 2008 |
Ni D, Lam T, Le Coz YL, Naeemi A, Meindl JD. Estimation of an RLC granularity metric for a CNT-bundle interconnect stack 2008 Proceedings - 25th International Vlsi Multilevel Interconnection Conference, Vmic 2008. 291-295. |
0.443 |
|
| 2007 |
Naeemi A, Meindl JD. Design and performance modeling for single-walled carbon nanotubes as local, semiglobal, and global interconnects in gigascale integrated systems Ieee Transactions On Electron Devices. 54: 26-37. DOI: 10.1109/Ted.2006.887210 |
0.612 |
|
| 2007 |
Naeemi A, Bakir MS. Chip-level and input/output interconnects for gigascale SOCs: Limits and opportunities 2006 Ieee International Systems-On-Chip Conference, Soc. 323-324. DOI: 10.1109/SOCC.2006.283908 |
0.516 |
|
| 2007 |
Naeemi A, Meindl JD. Conductance modeling for graphene nanoribbon (GNR) interconnects Ieee Electron Device Letters. 28: 428-431. DOI: 10.1109/Led.2007.895452 |
0.534 |
|
| 2007 |
Naeemi A, Meindl JD. Physical modeling of temperature coefficient of resistance for single- and multi-wall carbon nanotube interconnects Ieee Electron Device Letters. 28: 135-138. DOI: 10.1109/Led.2006.889240 |
0.529 |
|
| 2007 |
Sekar DC, Naeemi A, Sarvari R, Davis JA, Meindl JD. IntSim: A CAD tool for optimization of multilevel interconnect networks Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 560-567. DOI: 10.1109/ICCAD.2007.4397324 |
0.748 |
|
| 2007 |
Huang G, Bakir M, Naeemi A, Chen H, Meindl JD. Power delivery for 3D chip stacks: Physical modeling and design implication Ieee Topical Meeting On Electrical Performance of Electronic Packaging. 205-208. DOI: 10.1109/EPEP.2007.4387161 |
0.663 |
|
| 2007 |
Gang H, Sekar DC, Naeemi A, Shakeri K, Meindl JD. Compact physical models for power supply noise and chip/package co-design of gigascale integration Proceedings - Electronic Components and Technology Conference. 1659-1666. DOI: 10.1109/ECTC.2007.374017 |
0.766 |
|
| 2007 |
Naeemi A, Huang G, Meindl JD. Performance modeling for carbon nanotube interconnects in on-chip power distribution Proceedings - Electronic Components and Technology Conference. 420-428. DOI: 10.1109/ECTC.2007.373831 |
0.536 |
|
| 2007 |
Naeemi A, Sarvari R, Meindl JD. Performance modeling and optimization for single- and multi-wall carbon nanotube interconnects Proceedings - Design Automation Conference. 568-573. DOI: 10.1109/DAC.2007.375228 |
0.7 |
|
| 2007 |
Sarvari R, Naeemi A, Zarkesh-Ha P, Meindl JD. Design and optimization for nanoscale power distribution networks in gigascale systems Proceedings of the Ieee 2007 International Interconnect Technology Conference - Digest of Technical Papers. 190-192. |
0.775 |
|
| 2006 |
Naeemi A, Meindl JD. Compact physical models for multiwall carbon-nanotube interconnects Ieee Electron Device Letters. 27: 338-340. DOI: 10.1109/Led.2006.873765 |
0.545 |
|
| 2006 |
Naeemi A, Sarvari R, Meindl JD. On-chip interconnect networks at the end of the roadmap: Limits and nanotechnology opportunities 2006 International Interconnect Technology Conference, Iitc. 221-223. DOI: 10.1109/IITC.2006.1648693 |
0.698 |
|
| 2005 |
Mule AV, Villalaz RA, Joseph PJ, Naeemi A, Kohl PA, Gaylord TK, Meindl JD. Polylithic integration of electrical and optical interconnect technologies for gigascale fiber-to-the-chip communication Ieee Transactions On Advanced Packaging. 28: 421-433. DOI: 10.1109/Tadvp.2005.847838 |
0.537 |
|
| 2005 |
Naeemi A, Meindl JD. Monolayer metallic nanotube interconnects: Promising candidates for short local interconnects Ieee Electron Device Letters. 26: 544-546. DOI: 10.1109/Led.2005.852744 |
0.578 |
|
| 2005 |
Naeemi A, Meindl JD. Impact of electron-phonon scattering on the performance of carbon nanotube interconnects for GSI Ieee Electron Device Letters. 26: 476-478. DOI: 10.1109/Led.2005.851130 |
0.54 |
|
| 2005 |
Naeemi A, Sarvari R, Meindl JD. Performance comparison between carbon nanotube and copper interconnects for gigascale integration (GSI) Ieee Electron Device Letters. 26: 84-86. DOI: 10.1109/Led.2004.841440 |
0.72 |
|
| 2005 |
Sarvari R, Naeemi A, Venkatesan R, Meindl JD. Impact of size effects on the resistivity of copper wires and consequently the design and performance of metal interconnect networks Proceedings of the Ieee 2005 International Interconnect Technology Conference, Iitc. 197-199. |
0.693 |
|
| 2005 |
Huang G, Naeemi A, Meindl JD. Minimizing energy-per-bit for On-board LC transmission lines Proceedings of the Ieee 2005 International Interconnect Technology Conference, Iitc. 77-79. |
0.43 |
|
| 2005 |
Naeemi A, Meindl JD. Impact of deep sub-ambient cooling on GSI interconnect performance Proceedings of the Ieee 2005 International Interconnect Technology Conference, Iitc. 156-158. |
0.45 |
|
| 2005 |
Naeemi A, Joshi Y, Fedorov A, Kohl P, Meindl JD. The urgency of deep sub-ambient cooling for gigascale integration 2005 International Conference On Integrated Circuit Design and Technology, Icicdt. 171-174. |
0.448 |
|
| 2004 |
Naeemi A, Davis JA, Meindl JD. Compact physical models for multilevel interconnect crosstalk in gigascale integration (GSI) Ieee Transactions On Electron Devices. 51: 1902-1912. DOI: 10.1109/Ted.2004.837379 |
0.584 |
|
| 2004 |
Naeemi A, Davis JA, Meindl JD. Analysis and optimization of coplanar RLC lines for GSI global interconnection Ieee Transactions On Electron Devices. 51: 985-994. DOI: 10.1109/Ted.2004.829517 |
0.549 |
|
| 2004 |
Naeemi A, Sarvari R, Meindl JD. Performance comparison between carbon nanotube and copper interconnects for GSI Technical Digest - International Electron Devices Meeting, Iedm. 699-702. |
0.689 |
|
| 2004 |
Sarvari R, Naeemi A, Meindl JD. General compact model for bit-rate limit of electrical interconnects considering DC resistance, skin effect and surface scattering Proceedings of the Ieee 2004 International Interconnect Technology Conference. 163-165. |
0.674 |
|
| 2004 |
Naeemi A, Meindl JD. An upper limit for aggregate I/O interconnect bandwidth of GSI chips constrained by power dissipation Proceedings of the Ieee 2004 International Interconnect Technology Conference. 157-159. |
0.491 |
|
| 2003 |
Naeemi A, Venkatesan R, Meindl JD. Optimal global interconnects for GSI Ieee Transactions On Electron Devices. 50: 980-987. DOI: 10.1109/Ted.2003.812104 |
0.69 |
|
| 2002 |
Mule AV, Naeemi A, Glytsis EN, Gaylord TK, Meindl JD. Towards a comparison between chip-level optical interconnection and board-level exterconnection Proceedings of the Ieee 2002 International Interconnect Technology Conference, Iitc 2002. 92-94. DOI: 10.1109/IITC.2002.1014898 |
0.499 |
|
| 2002 |
Naeemi A, Venkatesan R, Meindl JD. System-on-a-chip global interconnect optimization Proceedings of the Annual Ieee International Asic Conference and Exhibit. 2002: 399-403. DOI: 10.1109/ASIC.2002.1158092 |
0.518 |
|
| 2001 |
Meindl JD, Venkatesan R, Davis JA, Joyner J, Naeemi A, Zarkesh-Ha P, Bakir M, Mulé T, Kohl PA, Martin KP. Interconnecting device opportunities for gigascale integration (GSI) Technical Digest - International Electron Devices Meeting. 525-528. |
0.769 |
|
| 2001 |
Naeemi A, Patel CS, Bakir MS, Zarkesh-Ha P, Martin KP, Meindl JD. Sea of leads: A disruptive paradigm for a system-on-a-chip (SoC) Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 280-281. |
0.743 |
|
| Low-probability matches (unlikely to be authored by this person) |
| 2012 |
Kumar V, Rakheja S, Naeemi A. Performance and energy-per-bit modeling of multilayer graphene nanoribbon conductors Ieee Transactions On Electron Devices. 59: 2753-2761. DOI: 10.1109/Ted.2012.2208753 |
0.299 |
|
| 2004 |
Naeemi A, Xu J, Mule AV, Gaylord TK, Meindl JD. Optical and electrical interconnect partition length based on chip-to-chip bandwidth maximization Ieee Photonics Technology Letters. 16: 1221-1223. DOI: 10.1109/Lpt.2004.824623 |
0.298 |
|
| 2018 |
Mousavi Iraei R, Kani N, Dutta S, Nikonov DE, Manipatruni S, Young IA, Heron JT, Naeemi A. Clocked Magnetostriction-Assisted Spintronic Device Design and Simulation Ieee Transactions On Electron Devices. 65: 2040-2046. DOI: 10.1109/Ted.2018.2817556 |
0.295 |
|
| 2012 |
Kani N, Naeemi A. Circuit-technology co-optimization of heterogeneous hierarchical network-on-chips 2012 Ieee International Interconnect Technology Conference, Iitc 2012. DOI: 10.1109/IITC.2012.6251645 |
0.29 |
|
| 2016 |
Chang S, Kani N, Manipatruni S, Nikonov DE, Young IA, Naeemi A. Scaling Limits on All-Spin Logic Ieee Transactions On Magnetics. 52: 1-4. DOI: 10.1109/Tmag.2016.2518702 |
0.285 |
|
| 2011 |
Ceyhan A, Naeemi A. Multilevel interconnect networks for the end of the roadmap: Conventional Cu/low-k and emerging carbon based interconnects 2011 Ieee International Interconnect Technology Conference and 2011 Materials For Advanced Metallization, Iitc/Mam 2011. DOI: 10.1109/IITC.2011.5940314 |
0.284 |
|
| 2018 |
Nashed R, Pan C, Brenner K, Naeemi A. Field emission from graphene sheets and its application in floating gate memories Semiconductor Science and Technology. 33: 125003. DOI: 10.1088/1361-6641/Aae626 |
0.28 |
|
| 2012 |
Ceyhan A, Naeemi A. System-level design and performance modeling for multilevel interconnect networks for carbon nanotube field-effect transistors Icicdt 2012 - Ieee International Conference On Integrated Circuit Design and Technology. DOI: 10.1109/ICICDT.2012.6232851 |
0.276 |
|
| 2013 |
Rakheja S, Chang SC, Naeemi A. Impact of dimensional scaling and size effects on spin transport in copper and aluminum interconnects Ieee Transactions On Electron Devices. 60: 3913-3919. DOI: 10.1109/Ted.2013.2282615 |
0.276 |
|
| 2010 |
Balakrishnan A, Naeemi A. Bandwidth, delay and energy aware optimization of global interconnects for many-core architectures 2010 Ieee International Interconnect Technology Conference, Iitc 2010. DOI: 10.1109/IITC.2010.5510317 |
0.276 |
|
| 2015 |
Pan C, Baert R, Ciofi I, Tokei Z, Naeemi A. System-Level Variation Analysis for Interconnection Networks at Sub-10-nm Technology Nodes Using Multiple Patterning Techniques Ieee Transactions On Electron Devices. 62: 2071-2077. DOI: 10.1109/Ted.2015.2427033 |
0.276 |
|
| 2015 |
Pan C, Mukhopadhyay S, Naeemi A. System-level chip/package co-design for multi-core processors implemented with power-gating technique 2014 Ieee 23rd Conference On Electrical Performance of Electronic Packaging and Systems, Epeps 2014. 11-14. DOI: 10.1109/EPEPS.2014.7103580 |
0.273 |
|
| 2014 |
Chang SC, Iraei RM, Manipatruni S, Nikonov DE, Young IA, Naeemi A. Design and analysis of copper and aluminum interconnects for all-spin logic Ieee Transactions On Electron Devices. 61: 2905-2911. DOI: 10.1109/Ted.2014.2327057 |
0.272 |
|
| 2020 |
Nashed R, Pan C, Wu X, Asselberghs I, Tokei Z, Catthoor F, Naeemi A. Accurate Determination of Interlayer Resistivity of 2-D Layered Systems: Graphene Case Study Ieee Transactions On Electron Devices. 67: 627-632. DOI: 10.1109/Ted.2019.2962181 |
0.268 |
|
| 2014 |
Bonhomme P, Manipatruni S, Iraei RM, Rakheja S, Chang SC, Nikonov DE, Young IA, Naeemi A. Circuit simulation of magnetization dynamics and spin transport Ieee Transactions On Electron Devices. 61: 1553-1560. DOI: 10.1109/Ted.2014.2305987 |
0.267 |
|
| 2017 |
Dutta S, Nikonov DE, Manipatruni S, Young IA, Naeemi A. Overcoming thermal noise in non-volatile spin wave logic. Scientific Reports. 7: 1915. PMID 28507305 DOI: 10.1038/S41598-017-01995-8 |
0.267 |
|
| 2016 |
Nashed R, Pan C, Brenner K, Naeemi A. Ultra-High Mobility in Dielectrically Pinned CVD Graphene Ieee Journal of the Electron Devices Society. 4: 466-472. DOI: 10.1109/Jeds.2016.2595498 |
0.266 |
|
| 2014 |
Kani N, Naeemi A. Wiring resource minimization for physically-complex Network-on-Chip architectures International System On Chip Conference. 261-266. DOI: 10.1109/SOCC.2014.6948938 |
0.265 |
|
| 2017 |
Pan C, Naeemi A. A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices Ieee Journal On Exploratory Solid-State Computational Devices and Circuits. 3: 93-100. DOI: 10.1109/Jxcdc.2017.2775518 |
0.262 |
|
| 2014 |
Chang SC, Manipatruni S, Nikonov DE, Young IA, Naeemi A. Design and analysis of Si interconnects for all-spin logic Ieee Transactions On Magnetics. 50. DOI: 10.1109/Tmag.2014.2325536 |
0.257 |
|
| 2014 |
Dutta S, Nikonov DE, Manipatruni S, Young IA, Naeemi A. SPICE circuit modeling of PMA spin wave bus excited using magnetoelectric effect Ieee Transactions On Magnetics. 50. DOI: 10.1109/Tmag.2014.2320942 |
0.257 |
|
| 2013 |
Pan C, Ceyhan A, Naeemi A. System-level optimization and benchmarking for InAs nanowire based gate-all-around tunneling FETs Proceedings - International Symposium On Quality Electronic Design, Isqed. 196-202. DOI: 10.1109/ISQED.2013.6523610 |
0.256 |
|
| 2020 |
Hsu C, Chang S, Nikonov DE, Young IA, Naeemi A. A Theoretical Study of Multidomain Ferroelectric Switching Dynamics With a Physics-Based SPICE Circuit Model for Phase-Field Simulations Ieee Transactions On Electron Devices. 67: 2952-2959. DOI: 10.1109/Ted.2020.2990891 |
0.256 |
|
| 2015 |
Dutta S, Nikonov DE, Manipatruni S, Young IA, Naeemi A. Phase-dependent deterministic switching of magnetoelectric spin wave detector in the presence of thermal noise via compensation of demagnetization Applied Physics Letters. 107. DOI: 10.1063/1.4935690 |
0.252 |
|
| 2013 |
Pan C, Naeemi A. System-level analysis for 3D interconnection networks Proceedings of the 2013 Ieee International Interconnect Technology Conference, Iitc 2013. DOI: 10.1109/IITC.2013.6615597 |
0.252 |
|
| 2012 |
Kumar V, Sharma R, Chen J, Kapoor A, Bashirullah R, Kohl P, Naeemi A. Compact modeling and performance optimization of 3D chip-to-chip interconnects with transmission lines, vias and discontinuities 2012 Ieee International Interconnect Technology Conference, Iitc 2012. DOI: 10.1109/IITC.2012.6251646 |
0.252 |
|
| 2015 |
Dutta S, Chang SC, Kani N, Nikonov DE, Manipatruni S, Young IA, Naeemi A. Non-volatile Clocked Spin Wave Interconnect for Beyond-CMOS Nanomagnet Pipelines. Scientific Reports. 5: 9861. PMID 25955353 DOI: 10.1038/Srep09861 |
0.252 |
|
| 2011 |
Banerjee A, Chatterjee S, Naeemi A, Chatterjee A. Power aware post-manufacture tuning of analog nanocircuits Proceedings - 16th Ieee European Test Symposium, Ets 2011. 57-62. DOI: 10.1109/ETS.2011.48 |
0.25 |
|
| 2017 |
Pan C, Naeemi A. Corrections to “Interconnect Design and Benchmarking for Charge-Based Beyond-CMOS Device Proposals” [Apr 16 508-511] Ieee Electron Device Letters. 38: 690-690. DOI: 10.1109/Led.2017.2687862 |
0.248 |
|
| 2002 |
Naeemi A, Davis JA, Meindl JD. Optimal global interconnecting devices for GSI Technical Digest - International Electron Devices Meeting. 319-322. |
0.248 |
|
| 2013 |
Ceyhan A, Naeemi A. Impact of conventional and emerging interconnects on the circuit performance of various post-CMOS devices Proceedings - International Symposium On Quality Electronic Design, Isqed. 203-209. DOI: 10.1109/ISQED.2013.6523611 |
0.246 |
|
| 2015 |
Rakheja S, Ceyhan A, Naeemi A. Interconnect considerations: Interconnect considerations Cmos and Beyond: Logic Switches For Terascale Integrated Circuits. 381-412. DOI: 10.1017/CBO9781107337886.021 |
0.246 |
|
| 2010 |
Jamal O, Naeemi A. Evolutionary and revolutionary interconnect technologies for performance enhancement of subthreshold circuits 2010 Ieee International Interconnect Technology Conference, Iitc 2010. DOI: 10.1109/IITC.2010.5510733 |
0.245 |
|
| 2017 |
Pan C, Naeemi A. Nonvolatile Spintronic Memory Array Performance Benchmarking Based on Three-Terminal Memory Cell Ieee Journal On Exploratory Solid-State Computational Devices and Circuits. 3: 10-17. DOI: 10.1109/Jxcdc.2017.2669213 |
0.244 |
|
| 2012 |
Pan C, Naeemi A. System-level optimization and benchmarking of graphene PN junction logic system based on empirical CPI model Icicdt 2012 - Ieee International Conference On Integrated Circuit Design and Technology. DOI: 10.1109/ICICDT.2012.6232850 |
0.244 |
|
| 2015 |
Mohseni J, Pan C, Naeemi A. Performace modeling and optimization for on-chip interconnects in memory arrays 2015 Ieee 24th Conference On Electrical Performance of Electronic Packaging and Systems, Epeps 2015. 149-152. DOI: 10.1109/EPEPS.2015.7347150 |
0.24 |
|
| 2014 |
Pan C, Mukhopadhyay S, Naeemi A. An analytical approach to system-level variation analysis and optimization for multi-core processor Proceedings - International Symposium On Quality Electronic Design, Isqed. 99-106. DOI: 10.1109/ISQED.2014.6783312 |
0.24 |
|
| 2017 |
Zografos O, Dutta S, Manfrini M, Vaysset A, Sorée B, Naeemi A, Raghavan P, Lauwereins R, Radu IP. Non-volatile spin wave majority gate at the nanoscale Aip Advances. 7: 056020. DOI: 10.1063/1.4975693 |
0.239 |
|
| 2014 |
Kumar V, Nashed R, Brenner K, Sandhu R, Naeemi A. System level analysis and benchmarking of graphene interconnects for low-power applications Ieee International Symposium On Electromagnetic Compatibility. 2014: 192-197. DOI: 10.1109/ISEMC.2014.6898968 |
0.237 |
|
| 2017 |
Chang S, Naeemi A, Nikonov DE, Gruverman A. Theoretical Approach to Electroresistance in Ferroelectric Tunnel Junctions Physical Review Applied. 7. DOI: 10.1103/Physrevapplied.7.024005 |
0.236 |
|
| 2013 |
Rakheja S, Kumar V, Naeemi A. Performance modeling for interconnects for conventional and emerging switches International Workshop On System Level Interconnect Prediction, Slip. DOI: 10.1109/SLIP.2013.6681683 |
0.235 |
|
| 2017 |
Kani N, Heron JT, Naeemi A. Strain-Mediated Magnetization Reversal Through Spin-Transfer Torque Ieee Transactions On Magnetics. 53: 1-8. DOI: 10.1109/Tmag.2017.2703898 |
0.235 |
|
| 2013 |
Rakheja S, Naeemi A. Roles of doping, temperature, and electric field on spin transport through semiconducting channels in spin valves Ieee Transactions On Nanotechnology. 12: 796-805. DOI: 10.1109/Tnano.2013.2274494 |
0.234 |
|
| 2017 |
Kani N, Naeemi A. Analytical models for coupling reliability in identical two-magnet systems during slow reversals Journal of Applied Physics. 122: 223902. DOI: 10.1063/1.4996934 |
0.234 |
|
| 2016 |
Kani N, Chang SC, Dutta S, Naeemi A. A Model Study of an Error-Free Magnetization Reversal Through Dipolar Coupling in a Two-Magnet System Ieee Transactions On Magnetics. 52. DOI: 10.1109/Tmag.2015.2475426 |
0.232 |
|
| 2020 |
Tao LL, Naeemi A, Tsymbal EY. Valley-Spin Logic Gates Physical Review Applied. 13. DOI: 10.1103/Physrevapplied.13.054043 |
0.225 |
|
| 2018 |
Kani N, Rakheja S, Naeemi A. Analytic modeling of dipolar field requirements for robust coupling in a non-identical biaxial two-magnet system Journal of Applied Physics. 124: 023901. DOI: 10.1063/1.5024821 |
0.221 |
|
| 2011 |
Rakheja S, Naeemi A. Interconnect performance and energy-per-bit for post-CMOS logic circuits: Modeling, analysis, and comparison with CMOS logic 2011 Ieee International Interconnect Technology Conference and 2011 Materials For Advanced Metallization, Iitc/Mam 2011. DOI: 10.1109/IITC.2011.5940267 |
0.216 |
|
| 2013 |
Rakheja S, Naeemi A. Transport of novel state variables Graphene Nanoelectronics: From Materials to Circuits. 113-136. DOI: 10.1007/978-1-4614-0548-1_5 |
0.214 |
|
| 2012 |
Pan C, Naeemi A. Device- and system-level performance modeling for graphene P-N junction logic Proceedings - International Symposium On Quality Electronic Design, Isqed. 262-269. DOI: 10.1109/ISQED.2012.6187504 |
0.214 |
|
| 2018 |
Pan C, Naeemi A. Correction to “A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices” [Dec 17 93-100] Ieee Journal On Exploratory Solid-State Computational Devices and Circuits. 4: 50-50. DOI: 10.1109/Jxcdc.2018.2859704 |
0.213 |
|
| 2018 |
Anupam A, Gupta R, Naeemi A, JafariNaimi N. Particle in a Box: An Experiential Environment for Learning Introductory Quantum Mechanics Ieee Transactions On Education. 61: 29-37. DOI: 10.1109/Te.2017.2727442 |
0.212 |
|
| 2012 |
Pan C, Naeemi A. System-level performance optimization and benchmarking for on-chip graphene interconnects 2012 Ieee 21st Conference On Electrical Performance of Electronic Packaging and Systems, Epeps 2012. 33-36. DOI: 10.1109/EPEPS.2012.6457837 |
0.212 |
|
| 2017 |
Kani N, Naeemi A, Rakheja S. Non-monotonic probability of thermal reversal in thin-film biaxial nanomagnets with small energy barriers Aip Advances. 7: 056006. DOI: 10.1063/1.4974017 |
0.211 |
|
| 2014 |
Ceyhan A, Jung M, Panth S, Lim SK, Naeemi A. Impact of size effects in local interconnects for future technology nodes: A study based on full-chip layouts 2014 Ieee International Interconnect Technology Conference / Advanced Metallization Conference, Iitc/Amc 2014. 345-348. DOI: 10.1109/IITC.2014.6831831 |
0.211 |
|
| 2011 |
Kumar V, Bashirullah R, Naeemi A. Modeling, optimization and benchmarking of chip-to-chip electrical interconnects with low loss air-clad dielectrics Proceedings - Electronic Components and Technology Conference. 2084-2090. DOI: 10.1109/ECTC.2011.5898805 |
0.205 |
|
| 2014 |
Naeemi A, Pan C, Ceyhan A, Iraei RM, Kumar V, Rakheja S. Beol scaling limits and next generation technology prospects Proceedings - Design Automation Conference. DOI: 10.1145/2593069.2596672 |
0.203 |
|
| 2013 |
Rakheja S, Kumar V, Naeemi A. Evaluation of the potential performance of graphene nanoribbons as on-chip interconnects Proceedings of the Ieee. 101: 1740-1765. DOI: 10.1109/JPROC.2013.2260235 |
0.202 |
|
| 2015 |
Chang SC, Ceyhan A, Kumar V, Naeemi A. Performance modeling for emerging interconnect technologies in CMOS and beyond-CMOS circuits Proceedings of the International Symposium On Low Power Electronics and Design. 2015: 63-68. DOI: 10.1145/2627369.2631638 |
0.2 |
|
| 2003 |
Naeemi A, Davis JA, Meindl JD. Compact physical models for multilevel interconnect crosstalk in a gigascale SoC Proceedings - Ieee International Soc Conference, Socc 2003. 199-202. DOI: 10.1109/SOC.2003.1241492 |
0.199 |
|
| 2013 |
Kumar V, Rakheja S, Naeemi A. Review of multi-layer graphene nanoribbons for on-chip interconnect applications Ieee International Symposium On Electromagnetic Compatibility. 528-533. DOI: 10.1109/ISEMC.2013.6670470 |
0.19 |
|
| 2016 |
Pan C, Chang SC, Naeemi A. Performance analyses and benchmarking for spintronic devices and interconnects 2016 Ieee International Interconnect Technology Conference / Advanced Metallization Conference, Iitc/Amc 2016. 56-58. DOI: 10.1109/IITC-AMC.2016.7507679 |
0.19 |
|
| 2020 |
Liao Y, Nikonov DE, Dutta S, Chang S, Manipatruni S, Young IA, Naeemi A. Simulation of the Magnetization Dynamics of a Single-Domain BiFeO3 Nanoisland Ieee Transactions On Magnetics. 1-1. DOI: 10.1109/Tmag.2020.3011932 |
0.19 |
|
| 2020 |
Liao YC, Nikonov DE, Dutta S, Chang SC, Hsu CS, Young IA, Naeemi A. Understanding the Switching Mechanisms of the Antiferromagnet/Ferromagnet Heterojunction. Nano Letters. PMID 33054222 DOI: 10.1021/acs.nanolett.0c01852 |
0.187 |
|
| 2016 |
Pan C, Naeemi A. (Invited) Beyond-CMOS Device and Interconnect Technology Benchmarking Based on a Fast Cross-Layer Optimization Methodology Ecs Transactions. 72: 93-103. DOI: 10.1149/07203.0093ecst |
0.184 |
|
| 2012 |
Sharma R, Uzunlar E, Kumar V, Saha R, Yeow X, Bashirullah R, Naeemi A, Kohl P. Design and fabrication of low-loss horizontal and vertical interconnect links using air-clad transmission lines and through silicon vias Proceedings - Electronic Components and Technology Conference. 2005-2012. DOI: 10.1109/ECTC.2012.6249115 |
0.18 |
|
| 2014 |
Kani N, Naeemi A. Pipeline design in spintronic circuits Proceedings of the 2014 Ieee/Acm International Symposium On Nanoscale Architectures, Nanoarch 2014. 110-115. DOI: 10.1109/NANOARCH.2014.6880496 |
0.18 |
|
| 2011 |
Rakheja S, Naeemi A. On physical limits and challenges of interconnects for spin devices Proceedings of the Ieee Conference On Nanotechnology. 1389-1394. DOI: 10.1109/NANO.2011.6144321 |
0.168 |
|
| 2013 |
Uzunlar E, Sharma R, Saha R, Kumar V, Bashirullah R, Naeemi A, Kohl PA. Design and fabrication of ultra low-loss, high-performance 3D chip-chip air-clad interconnect pathway Proceedings - Electronic Components and Technology Conference. 1425-1432. DOI: 10.1109/ECTC.2013.6575760 |
0.168 |
|
| 2014 |
Naeemi A. SPICE models for metallic all-spin-logic devices and interconnects Device Research Conference - Conference Digest, Drc. 287-288. DOI: 10.1109/DRC.2014.6872409 |
0.166 |
|
| 2015 |
Pan C, Raghavan P, Catthoor F, Tokei Z, Naeemi A. Technology/circuit co-optimization and benchmarking for graphene interconnects at Sub-10nm technology node Proceedings - International Symposium On Quality Electronic Design, Isqed. 2015: 599-603. DOI: 10.1109/ISQED.2015.7085495 |
0.165 |
|
| 2011 |
Kumar V, Rakheja S, Naeemi A. Modeling and optimization for multi-layer graphene nanoribbon conductors 2011 Ieee International Interconnect Technology Conference and 2011 Materials For Advanced Metallization, Iitc/Mam 2011. DOI: 10.1109/IITC.2011.5940340 |
0.154 |
|
| 2011 |
Rakheja S, Naeemi A. Interconnection aspects of spin torque devices: Delay, energy-per-bit, and circuit size modeling Proceedings of the 12th International Symposium On Quality Electronic Design, Isqed 2011. 736-744. DOI: 10.1109/ISQED.2011.5770811 |
0.154 |
|
| 2003 |
Naeemi A, Mule AV, Meindl JD. Partition length between board-level electrical and optical interconnects Proceedings of the Ieee 2003 International Interconnect Technology Conference, Iitc 2003. 230-232. DOI: 10.1109/IITC.2003.1219762 |
0.153 |
|
| 2001 |
Naeemi A, Davis JA, Meindl JD. Analytical models for coupled distributed RLC lines with ideal and non-ideal return paths Technical Digest - International Electron Devices Meeting. 689-692. |
0.149 |
|
| 2021 |
Barman A, Gubbiotti G, Ladak S, Adeyeye AO, Krawczyk M, Gräfe J, Adelmann C, Cotofana S, Naeemi A, Vasyuchka VI, Hillebrands B, Nikitov SA, Yu H, Grundler D, Sadovnikov A, et al. The 2021 Magnonics Roadmap. Journal of Physics. Condensed Matter : An Institute of Physics Journal. PMID 33662946 DOI: 10.1088/1361-648X/abec1a |
0.145 |
|
| 2016 |
Naeemi A, Sou-Chi C, Dutta S, Chenyun P, Manipatruni S, Nikonov D, Young I. Spin-based interconnect technology and design 2016 Ieee International Interconnect Technology Conference / Advanced Metallization Conference, Iitc/Amc 2016. DOI: 10.1109/IITC-AMC.2016.7507735 |
0.141 |
|
| 2014 |
Iraei RM, Bonhomme P, Kani N, Manipatruni S, Nikonov DE, Young IA, Naeemi A. Impact of dimensional scaling and size effects on beyond CMOS All-Spin Logic interconnects 2014 Ieee International Interconnect Technology Conference / Advanced Metallization Conference, Iitc/Amc 2014. 353-356. DOI: 10.1109/IITC.2014.6831833 |
0.129 |
|
| 2022 |
Zhang D, Bapna M, Jiang W, Sousa D, Liao YC, Zhao Z, Lv Y, Sahu P, Lyu D, Naeemi A, Low T, Majetich SA, Wang JP. Bipolar Electric-Field Switching of Perpendicular Magnetic Tunnel Junctions through Voltage-Controlled Exchange Coupling. Nano Letters. PMID 34982564 DOI: 10.1021/acs.nanolett.1c03395 |
0.127 |
|
| 2015 |
Ayatollahi MR, Naeemi AR, Alishahi E. Effects of mixed contents of carbon nanoreinforcements on the impact resistance of epoxy-based nano composites Structural Engineering and Mechanics. 56: 157-167. DOI: 10.12989/sem.2015.56.2.157 |
0.114 |
|
| 2012 |
Rakheja S, Naeemi A. Compact modeling of spin-transport parameters in semiconducting channels in non-local spin-torque devices Proceedings of the Ieee Conference On Nanotechnology. DOI: 10.1109/NANO.2012.6321912 |
0.113 |
|
| 2015 |
Kani N, Dutta S, Naeemi A. Analysis of coupling strength in multi-domain magneto-systems Device Research Conference - Conference Digest, Drc. 2015: 111-112. DOI: 10.1109/DRC.2015.7175580 |
0.108 |
|
| 2010 |
Naeemi A. Work in progress - Carbon nanomaterials: A platform to teach fundamentals of nanoelectronics Proceedings - Frontiers in Education Conference, Fie. S3C1-S3C2. DOI: 10.1109/FIE.2010.5673499 |
0.108 |
|
| 2012 |
Kumar V, Naeemi A. Analytical models for the frequency response of multi-layer graphene nanoribbon interconnects Ieee International Symposium On Electromagnetic Compatibility. 440-445. DOI: 10.1109/ISEMC.2012.6351837 |
0.095 |
|
| 2019 |
Anupam A, Gupta R, Gupta S, Li Z, Hong N, Naeemi A, JafariNaimi N. Design Challenges for Science Games: International Journal of Designs For Learning. 11: 1-20. DOI: 10.14434/ijdl.v11i1.24264 |
0.087 |
|
| 2012 |
D'amore M, Sarto MS, Hanson GW, Naeemi A, Tay BK. Guest Editorial Special Issue on applications of nanotechnology in electromagnetic compatibility (nano-EMC) Ieee Transactions On Electromagnetic Compatibility. 54: 2-5. DOI: 10.1109/TEMC.2012.2185501 |
0.07 |
|
| 1984 |
Albrecht P, Naeemi AH. PERFORMANCE OF WEATHERING STEEL IN BRIDGES National Cooperative Highway Research Program Report. |
0.059 |
|
| 2015 |
Peng R, Dorn B, Naeemi A, Jafarinaimi N. Interactive visualizations for teaching quantum mechanics and semiconductor physics Proceedings - Frontiers in Education Conference, Fie. 2015. DOI: 10.1109/FIE.2014.7044207 |
0.044 |
|
| 2014 |
Salehzadeh A, Asadpour L, Naeemi AS, Houshmand E. Antimicrobial activity of methanolic extracts of Sambucus ebulus and Urtica dioica against clinical isolates of methicillin resistant Staphylococcus aureus African Journal of Traditional, Complementary and Alternative Medicines. 11: 38-40. PMID 25395702 DOI: 10.4314/ajtcam.v11i5.6 |
0.025 |
|
| 2014 |
Nazari I, Esfehani MH, Nouri M, Naeemi AR, Salimi J, Zafarghandi MR. Cervical sympathetic schwannoma: Report of two cases and review of the literature Acta Medica Iranica. 52: 569-574. PMID 25135269 |
0.025 |
|
| 2010 |
Kim H, Naeemi A, Nelson A, Ro HW, Toma D. Materials Research Society Symposium Proceedings: Preface symposium F Materials Research Society Symposium Proceedings. 1249: xiv. |
0.019 |
|
| 2014 |
Salehzadeh A, Naeemi AS, Arasteh A. Biodiesel production from Azolla filiculoides (Water Fern) Tropical Journal of Pharmaceutical Research. 13: 957-960. DOI: 10.4314/tjpr.v13i6.19 |
0.01 |
|
| 2013 |
Naeemi A, Jamili S, Shabanipour N, Mashinchian A, Shariati Feizabadi S. Histopathological changes of gill, liver and kidney in Caspian kutum exposed to Linear Alkylbenzene Sulfonate Iranian Journal of Fisheries Sciences. 12: 887-897. |
0.01 |
|
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