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Vladimir Stojanovic, Ph.D. - Publications

Affiliations: 
Electrical Engineering and Computer Science University of California, Berkeley, Berkeley, CA, United States 
 2005 Stanford University, Palo Alto, CA 
Area:
Integrated Circuits (INC); Micro/Nano Electro Mechanical Systems (MEMS); Computer Architecture & Engineering (ARC); Physical Electronics (PHY); Communications & Networking (COMNET); Integrated Photonics, Circuit design with Emerging-Technologies
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64 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Wade M, Anderson E, Ardalan S, Bhargava P, Buchbinder S, L. Davenport M, Fini J, Lu H, Li C, Meade R, Ramamurthy C, Rust M, Sedgwick F, Stojanovic V, Van Orden D, et al. TeraPHY: A Chiplet Technology for Low-Power, High-Bandwidth In-Package Optical I/O Ieee Micro. 40: 63-71. DOI: 10.1109/Mm.2020.2976067  0.46
2020 Mehta N, Lin S, Yin B, Moazeni S, Stojanovic V. A Laser-Forwarded Coherent Transceiver in 45-nm SOI CMOS Using Monolithic Microring Resonators Ieee Journal of Solid-State Circuits. 55: 1096-1107. DOI: 10.1109/Jssc.2020.2968764  0.387
2019 Kim T, Bhargava P, Poulton CV, Notaros J, Yaacobi A, Timurdogan E, Baiocco C, Fahrenkopf N, Kruger S, Ngai T, Timalsina Y, Watts MR, Stojanovic V. A Single-Chip Optical Phased Array in a Wafer-Scale Silicon Photonics/CMOS 3D-Integration Platform Ieee Journal of Solid-State Circuits. 54: 3061-3074. DOI: 10.1109/Jssc.2019.2934601  0.417
2019 Mehta N, Sun C, Wade M, Stojanovic V. A Differential Optical Receiver With Monolithic Split-Microring Photodetector Ieee Journal of Solid-State Circuits. 54: 2230-2242. DOI: 10.1109/Jssc.2019.2917146  0.421
2019 Mehta N, Huijsing JH, Stojanovic V. A 1-mW Class-AB Amplifier With −101 dB THD+N for High-Fidelity 16 $\Omega$ Headphones in 65-nm CMOS Ieee Journal of Solid-State Circuits. 54: 948-958. DOI: 10.1109/Jssc.2018.2886320  0.411
2018 Stojanović V, Ram RJ, Popović M, Lin S, Moazeni S, Wade M, Sun C, Alloatti L, Atabaki A, Pavanello F, Mehta N, Bhargava P. Monolithic silicon-photonic platforms in state-of-the-art CMOS SOI processes [Invited]. Optics Express. 26: 13106-13121. PMID 29801342 DOI: 10.1364/Oe.26.013106  0.404
2018 Atabaki AH, Moazeni S, Pavanello F, Gevorgyan H, Notaros J, Alloatti L, Wade MT, Sun C, Kruger SA, Meng H, Al Qubaisi K, Wang I, Zhang B, Khilo A, Baiocco CV, et al. Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip. Nature. 556: 349-354. PMID 29670262 DOI: 10.1038/S41586-018-0028-Z  0.321
2018 Tanovic O, Megretski A, Li Y, Stojanovic V, Osqui M. Equivalent Baseband Models and Corresponding Digital Predistortion for Compensating Dynamic Passband Nonlinearities in Phase-Amplitude Modulation-Demodulation Schemes Ieee Transactions On Signal Processing. 66: 5972-5987. DOI: 10.1109/Tsp.2018.2871385  0.342
2017 Settaluri KT, Lalau-Keraly C, Yablonovitch E, Stojanovic V. First Principles Optimization of Opto-Electronic Communication Links Ieee Transactions On Circuits and Systems I: Regular Papers. 64: 1270-1283. DOI: 10.1109/Tcsi.2016.2633942  0.421
2017 Moazeni S, Lin S, Wade M, Alloatti L, Ram RJ, Popovic M, Stojanovic V. A 40-Gb/s PAM-4 Transmitter Based on a Ring-Resonator Optical DAC in 45-nm SOI CMOS Ieee Journal of Solid-State Circuits. 52: 3503-3516. DOI: 10.1109/Jssc.2017.2748620  0.438
2017 Lin S, Moazeni S, Settaluri KT, Stojanovic V. Electronic–Photonic Co-Optimization of High-Speed Silicon Photonic Transmitters Journal of Lightwave Technology. 35: 4766-4780. DOI: 10.1109/Jlt.2017.2757945  0.423
2016 Kang Y, Bokor J, Stojanovic V. Design Requirements for a Spintronic MTJ Logic Device for Pipelined Logic Applications Ieee Transactions On Electron Devices. DOI: 10.1109/Ted.2016.2527046  0.435
2016 Kato K, Stojanovic V, Liu TK. Embedded Nano-Electro-Mechanical Memory for Energy-Efficient Reconfigurable Logic Ieee Electron Device Letters. 37: 1563-1565. DOI: 10.1109/Led.2016.2621187  0.342
2016 Kato K, Stojanovic V, Liu TJK. Non-Volatile Nano-Electro-Mechanical Memory for Energy-Efficient Data Searching Ieee Electron Device Letters. 37: 31-34. DOI: 10.1109/Led.2015.2504955  0.312
2016 Sun C, Wade M, Georgas M, Lin S, Alloatti L, Moss B, Kumar R, H. Atabaki A, Pavanello F, M. Shainline J, S. Orcutt J, J. Ram R, Popovic M, Stojanovic V. A 45 nm CMOS-SOI Monolithic Photonics Platform With Bit-Statistics-Based Resonant Microring Thermal Tuning Ieee Journal of Solid-State Circuits. DOI: 10.1109/Jssc.2016.2519390  0.467
2015 Sun C, Wade MT, Lee Y, Orcutt JS, Alloatti L, Georgas MS, Waterman AS, Shainline JM, Avizienis RR, Lin S, Moss BR, Kumar R, Pavanello F, Atabaki AH, Cook HM, et al. Single-chip microprocessor that communicates directly using light. Nature. 528: 534-8. PMID 26701054 DOI: 10.1038/Nature16454  0.309
2015 Sorace-Agaskar C, Leu J, Watts MR, Stojanovic V. Electro-optical co-simulation for integrated CMOS photonic circuits with VerilogA. Optics Express. 23: 27180-203. PMID 26480379 DOI: 10.1364/Oe.23.027180  0.353
2015 McDonough C, Tulipe DL, Pascual D, Tariello P, Mucci J, Smalley M, Nguyen A, Vo T, Johnson C, Nguyen P, Hebding J, Leake G, Moresco M, Timurdogan E, Stojanović V, et al. Heterogeneous Integration of a 300mm Silicon Photonics-CMOS Wafer Stack by Direct Oxide Bonding and Via-last 3D Interconnection Journal of Microelectronics and Electronic Packaging. 2015: 621-626. DOI: 10.4071/Isom-2015-Tha35  0.307
2015 Popović MA, Wade MT, Orcutt JS, Shainline JM, Sun C, Georgas M, Moss B, Kumar R, Alloatti L, Pavanello F, Chen YH, Nammari K, Notaros J, Atabaki A, Leu J, et al. Monolithic silicon photonics in a sub-100nm SOI CMOS microprocessor foundry: Progress from devices to systems Proceedings of Spie - the International Society For Optical Engineering. 9367. DOI: 10.1117/12.2084604  0.335
2015 Sun C, Wade M, Georgas M, Lin S, Alloatti L, Moss B, Kumar R, Atabaki A, Pavanello F, Ram R, Popović M, Stojanović V. A 45nm SOI monolithic photonics chip-to-chip link with bit-statistics-based resonant microring thermal tuning Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 2015: C122-C123. DOI: 10.1109/VLSIC.2015.7231348  0.344
2015 Sun C, Georgas M, Orcutt J, Moss B, Chen YH, Shainline J, Wade M, Mehta K, Nammari K, Timurdogan E, Miller D, Tehar-Zahav O, Sternberg Z, Leu J, Chong J, et al. A Monolithically-Integrated Chip-to-Chip Optical Link in Bulk CMOS Ieee Journal of Solid-State Circuits. 50: 828-844. DOI: 10.1109/Jssc.2014.2382101  0.442
2015 Settaluri KT, Lin S, Moazeni S, Timurdogan E, Sun C, Moresco M, Su Z, Chen YH, Leake G, Latulipe D, McDonough C, Hebding J, Coolbaugh D, Watts M, Stojanović V. Demonstration of an optical chip-to-chip link in a 3D integrated electronic-photonic platform European Solid-State Circuits Conference. 2015: 156-159. DOI: 10.1109/ESSCIRC.2015.7313852  0.353
2015 Alloatti L, Wade M, Stojanovic V, Popovic M, Ram RJ. Photonics design tool for advanced CMOS nodes Iet Optoelectronics. 9: 163-167. DOI: 10.1049/Iet-Opt.2015.0003  0.373
2014 Wade MT, Shainline JM, Orcutt JS, Ram RJ, Stojanovic V, Popovic MA. Spoked-ring microcavities: enabling seamless integration of nanophotonics in unmodified advanced CMOS microelectronics chips Proceedings of Spie. 8991. DOI: 10.1117/12.2054788  0.45
2014 Meade R, Orcutt JS, Mehta K, Tehar-Zahav O, Miller D, Georgas M, Moss B, Sun C, Chen YH, Shainline J, Wade M, Bafrali R, Sternberg Z, MacHavariani G, Sandhu G, et al. Integration of silicon photonics in bulk CMOS Digest of Technical Papers - Symposium On Vlsi Technology. DOI: 10.1109/VLSIT.2014.6894427  0.303
2014 Suleiman A, Sredojevic R, Stojanovic V. Model Predictive Control Equalization for High-Speed I/O Links Ieee Transactions On Circuits and Systems. 61: 371-381. DOI: 10.1109/Tcsi.2013.2278353  0.315
2013 Shainline JM, Orcutt JS, Wade MT, Nammari K, Tehar-Zahav O, Sternberg Z, Meade R, Ram RJ, Stojanović V, Popović MA. Depletion-mode polysilicon optical modulators in a bulk complementary metal-oxide semiconductor process. Optics Letters. 38: 2729-31. PMID 23903125 DOI: 10.1364/Ol.38.002729  0.433
2013 Shainline JM, Orcutt JS, Wade MT, Nammari K, Moss B, Georgas M, Sun C, Ram RJ, Stojanović V, Popović MA. Depletion-mode carrier-plasma optical modulator in zero-change advanced CMOS. Optics Letters. 38: 2657-9. PMID 23903103 DOI: 10.1364/Ol.38.002657  0.428
2013 Shainline JM, Orcutt JS, Wade MT, Nammari K, Moss B, Georgas M, Sun C, Ram RJ, Stojanovic V, Popovic MA. Depletion-mode carrier-plasma optical modulator in zero-change advanced CMOS Optics Letters. 38: 2657-2659. DOI: 10.1364/OL.38.002657  0.319
2013 Fariborzi H, Chen F, Nathanael R, Chen IR, Hutin L, Lee R, Liu TJK, Stojanovic V. Relays do not leak - CMOS does Proceedings - Design Automation Conference. DOI: 10.1145/2463209.2488890  0.39
2013 Orcutt JS, Ram RJ, Stojanovic V. Integration of silicon photonics into electronic processes Proceedings of Spie. 8629. DOI: 10.1117/12.2004811  0.407
2013 Abari O, Lim F, Chen F, Stojanovic V. Why Analog-to-Information Converters Suffer in High-Bandwidth Sparse Signal Applications Ieee Transactions On Circuits and Systems. 60: 2273-2284. DOI: 10.1109/Tcsi.2013.2246212  0.409
2013 Chen F, Lim F, Abari O, Chandrakasan A, Stojanovic V. Energy-Aware Design of Compressed Sensing Systems for Wireless Sensors Under Performance and Reliability Constraints Ieee Transactions On Circuits and Systems. 60: 650-661. DOI: 10.1109/Tcsi.2012.2215738  0.336
2013 Sun C, Timurdogan E, Watts MR, Stojanovic V. Integrated microring tuning in deep-trench bulk CMOS 2013 Optical Interconnects Conference, Oi 2013. 54-55. DOI: 10.1109/OIC.2013.6552920  0.319
2013 Young IA, Bergman K, Krishnamoorthy AV, Stojanovic V. Introduction to the issue on optical interconnects for data centers Ieee Journal On Selected Topics in Quantum Electronics. 19. DOI: 10.1109/Jstqe.2013.2249631  0.349
2013 Li Y, Li Z, Uyar O, Avniel Y, Megretski A, Stojanovic V. High-Throughput Signal Component Separator for Asymmetric Multi-Level Outphasing Power Amplifiers Ieee Journal of Solid-State Circuits. 48: 369-380. DOI: 10.1109/Jssc.2012.2229071  0.441
2012 Orcutt JS, Tang SD, Kramer S, Mehta K, Li H, Stojanović V, Ram RJ. Low-loss polysilicon waveguides fabricated in an emulated high-volume electronics process. Optics Express. 20: 7243-54. PMID 22453406 DOI: 10.1364/Oe.20.007243  0.338
2012 Liu TJK, Markovic D, Stojanovic V, Alon E. The relay reborn Ieee Spectrum. 49: 38-43. DOI: 10.1109/Mspec.2012.6172808  0.641
2012 Georgas M, Orcutt J, Ram RJ, Stojanovic V. A Monolithically-Integrated Optical Receiver in Standard 45-nm SOI Ieee Journal of Solid-State Circuits. 47: 1693-1702. DOI: 10.1109/Jssc.2012.2191684  0.472
2012 Batten C, Joshi A, Stojanovic V, Asanovic K. Designing Chip-Level Nanophotonic Interconnection Networks Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 2: 137-153. DOI: 10.1109/Jetcas.2012.2193932  0.34
2011 Kam H, Liu TJK, Stojanović V, Marković D, Alon E. Design, optimization, and scaling of MEM relays for ultra-low-power digital logic Ieee Transactions On Electron Devices. 58: 236-250. DOI: 10.1109/Ted.2010.2082545  0.63
2011 Vamvakos SD, Stojanović V, Nikolić B. Discrete-time, linear periodically time-variant phase-locked loop model for jitter analysis Ieee Transactions On Circuits and Systems I: Regular Papers. 58: 1211-1224. DOI: 10.1109/Tcsi.2010.2097694  0.302
2011 Sredojevic R, Stojanovic V. Fully Digital Transmit Equalizer With Dynamic Impedance Modulation Ieee Journal of Solid-State Circuits. 46: 1857-1869. DOI: 10.1109/Jssc.2011.2151530  0.443
2011 Spencer M, Chen F, Wang CC, Nathanael R, Fariborzi H, Gupta A, Kam H, Pott V, Jeon J, Liu TJK, Marković D, Alon E, Stojanović V. Demonstration of integrated micro-electro-mechanical relay circuits for VLSI applications Ieee Journal of Solid-State Circuits. 46: 308-320. DOI: 10.1109/Jssc.2010.2074370  0.646
2010 Beamer S, Sun C, Kwon YJ, Joshi A, Batten C, Stojanović V, Asanović K. Re-architecting DRAM memory systems with monolithically integrated silicon photonics Proceedings - International Symposium On Computer Architecture. 129-140. DOI: 10.1145/1815961.1815978  0.393
2010 Stojanovic VM, Yang CK, Ho R. Guest Editorial for Special Issue on High-Performance Multichip Interconnections Ieee Transactions On Circuits and Systems Ii-Express Briefs. 57: 317-318. DOI: 10.1109/Tcsii.2010.2048057  0.504
2010 Chen F, Spencer M, Nathanael R, Wang C, Fariborzi H, Gupta A, Kam H, Pott V, Jeon J, King Liu TJ, Markovic D, Stojanovic V, Alon E. Demonstration of integrated micro-electro-mechanical switch circuits for VLSI applications Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 53: 150-151. DOI: 10.1109/ISSCC.2010.5434010  0.586
2010 Fariborzi H, Spencer M, Karkare V, Jeon J, Nathanael R, Wang C, Chen F, Kam H, Pott V, Liu TJK, Alon E, Stojanović V, Marković D. Analysis and demonstration of MEM-relay power gating Proceedings of the Custom Integrated Circuits Conference. DOI: 10.1109/CICC.2010.5617380  0.66
2009 Blitvic N, Lee M, Stojanovic V. Channel Coding For High-Speed Links: A Systematic Look at Code Performance and System Simulation Ieee Transactions On Advanced Packaging. 32: 268-279. DOI: 10.1109/Tadvp.2009.2015283  0.332
2009 Batten C, Joshi A, Orcutt J, Khilo A, Moss B, Holzwarth CW, Popovic MA, Li H, Smith HL, Hoyt JL, Kartner FX, Ram RJ, Stojanović V, Asanović K. Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics Ieee Micro. 29: 8-21. DOI: 10.1109/Mm.2009.60  0.383
2008 Oh KS, Lambrecht F, Chang S, Lin Q, Ren J, Yuan C, Zerbe J, Stojanovic V. Accurate System Voltage and Timing Margin Simulation in High-Speed I/O System Designs Ieee Transactions On Advanced Packaging. 31: 722-730. DOI: 10.1109/Tadvp.2008.923388  0.319
2008 Amirkhany A, Abbasfar A, Savoj J, Jeeradit M, Garlepp B, Kollipara RT, Stojanovic V, Horowitz M. A 24 Gb/s software programmable analog multi-tone transmitter Ieee Journal of Solid-State Circuits. 43: 999-1008. DOI: 10.1109/Jssc.2008.917520  0.66
2008 Chen EH, Ren J, Leibowitz B, Lee HC, Lin Q, Oh KS, Lambrecht F, Stojanović V, Zerbe J, Yang CKK. Near-optimal equalizer and timing adaptation for I/O links using a BER-based metric Ieee Journal of Solid-State Circuits. 43: 2144-2156. DOI: 10.1109/Jssc.2008.2001871  0.367
2008 Chen F, Kam H, Marković D, Liu TJK, Stojanović V, Alon E. Integrated circuit design with NEM relays Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 750-757. DOI: 10.1109/ICCAD.2008.4681660  0.633
2007 Barwicz T, Byun H, Gan F, Holzwarth CW, Popović MA, Rakich PT, Watts MR, Ippen EP, Kärtner FX, Smith HI, Orcutt JS, Ram RJ, Stojanovic V, Olubuyide OO, Hoyt JL, et al. Silicon photonics for compact, energy-efficient interconnects [Invited] Journal of Optical Networking. 6: 63-73. DOI: 10.1364/Jon.6.000063  0.456
2007 Amirkhany A, Abbasfar A, Savoj J, Jeeradit M, Garlepp B, Stojanovic V, Horowitz M. A 24Gb/s software programmable multi-channel transmitter Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 38-39. DOI: 10.1109/VLSIC.2007.4342757  0.367
2006 Hatamkhani H, Lambrecht F, Stojanovic V, Yang CKK. Power-centric design of high-speed I/Os Proceedings - Design Automation Conference. 867-872. DOI: 10.1145/1146909.1147130  0.33
2006 Amirkhany A, Abbasfar A, Stojanović V, Horowitz MA. Analog multi-tone signaling for high-speed backplane electrical links Globecom - Ieee Global Telecommunications Conference. DOI: 10.1109/GLOCOM.2006.548  0.307
2005 Stojanovic V, Ho A, Garlepp B, Chen F, Wei J, Tsang G, Alon E, Kollipara R, Werner C, Zerbe J, Horowitz M. Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery Ieee Journal of Solid-State Circuits. 40: 1012-1026. DOI: 10.1109/Jssc.2004.842863  0.644
2005 Alon E, Stojanovic V, Horowitz M. Circuits and techniques for high-resolution measurement of on-chip power supply noise Ieee Journal of Solid-State Circuits. 40: 820-828. DOI: 10.1109/Jssc.2004.842853  0.623
2004 Marković D, Stojanović V, Nikolić B, Horowitz MA, Brodersen RW. Methods for true energy-performance optimization Ieee Journal of Solid-State Circuits. 39: 1282-1293. DOI: 10.1109/Jssc.2004.831796  0.363
2001 Yang CKK, Stojanovic V, Modjtahedi S, Horowitz MA, Ellersick WF. A serial-link transceiver based on 8-GSamples/s A/D and D/A converters in 0.25-μm CMOS Ieee Journal of Solid-State Circuits. 36: 1684-1692. DOI: 10.1109/4.962288  0.335
2000 Nikolic B, Oklobdzija VG, Stojanovic V, Jia W, Chiu JK, Leung MM. Improved sense-amplifier-based flip-flop: design and measurements Ieee Journal of Solid-State Circuits. 35: 876-884. DOI: 10.1109/4.845191  0.41
1999 Stojanovic V, Oklobdzija VG. Comparative analysis of master-slave latches and flip-flops for high-performance and low-power systems Ieee Journal of Solid-State Circuits. 34: 536-548. DOI: 10.1109/4.753687  0.367
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