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Animesh Datta, Ph.D. - Publications

Affiliations: 
2006 Electrical and Computer Engineering Purdue University, West Lafayette, IN, United States 
Area:
Electronics and Electrical Engineering
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6 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2016 Kumar V, Chattopadhyay A, Ghosh S, Irfan M, Chakraborty N, Chakraborty S, Datta A. Improving nutritional quality and fungal tolerance in soya bean and grass pea by expressing an oxalate decarboxylase. Plant Biotechnology Journal. PMID 26798990 DOI: 10.1111/pbi.12503  0.439
2008 Datta A, Bhunia S, Choi JH, Mukhopadhyay S, Roy K. Profit Aware Circuit Design Under Process Variations Considering Speed Binning Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 16: 806-815. DOI: 10.1109/Tvlsi.2008.2000364  0.615
2007 Datta A, Goel A, Cakici RT, Mahmoodi H, Lekshmanan D, Roy K. Modeling and Circuit Synthesis for Independently Controlled Double Gate FinFET Devices Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 1957-1966. DOI: 10.1109/Tcad.2007.896320  0.59
2006 Datta A, Bhunia S, Mukhopadhyay S, Roy K. Delay Modeling and Statistical Design of Pipelined Circuit Under Process Variation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 2427-2436. DOI: 10.1109/Tcad.2006.873886  0.614
2005 Agarwal A, Paul B, Mahmoodi H, Datta A, Roy K. A process-tolerant cache architecture for improved yield in nanoscale technologies Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 13: 27-38. DOI: 10.1109/Tvlsi.2004.840407  0.475
2005 Bhunia S, Datta A, Banerjee N, Roy K. GAARP: A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks Ieee Transactions On Computers. 54: 752-766. DOI: 10.1109/Tc.2005.99  0.587
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