Year |
Citation |
Score |
2011 |
Xie J, Lee C, Wang M, Feng H. Seal and encapsulate cavities for complementary metal-oxide-semiconductor microelectromechanical system thermoelectric power generators Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena. 29: 21401. DOI: 10.1116/1.3556954 |
0.308 |
|
2010 |
Wang MF, Maleki T, Ziaie B. A self-assembled 3D microelectrode array Journal of Micromechanics and Microengineering. 20. DOI: 10.1088/0960-1317/20/3/035013 |
0.541 |
|
2008 |
Wang MF, Maleki T, Ziaie B. Enhanced 3-D folding of silicon microstructures via thermal shrinkage of a composite organic/inorganic bilayer Journal of Microelectromechanical Systems. 17: 882-889. DOI: 10.1109/Jmems.2008.926138 |
0.547 |
|
2007 |
Wang MF, Raghunathan N, Ziaie B. A nonlithographic top-down electrochemical approach for creating hierarchical (micro-nano) superhydrophobic silicon surfaces. Langmuir : the Acs Journal of Surfaces and Colloids. 23: 2300-3. PMID 17266346 DOI: 10.1021/La063230L |
0.51 |
|
2003 |
Yang CW, Fang YK, Chen SF, Lin CY, Wang MF, Lin YM, Hou TH, Yao LG, Chen SC, Liang MS. Effective improvement of high-k Hf-silicate/silicon interface with thermal nitridation Electronics Letters. 39: 421-422. DOI: 10.1049/El:20030278 |
0.353 |
|
2002 |
Chen C, Fang Y, Yang C, Tsair Y, Wang M, Yao L, Chen S, Yu C, Liang M. The 1.3–1.6 nm nitrided oxide prepared by NH3 nitridation and rapid thermal annealing for 0.1 μm and beyond CMOS technology application Solid-State Electronics. 46: 539-544. DOI: 10.1016/S0038-1101(01)00274-X |
0.355 |
|
2001 |
Chen C, Fang Y, Yang C, Ting S, Tsair Y, Wang M, Hou T, Yu M, Chen S, Jang SM, Yu DCH, Liang M. To optimize electrical properties of the ultrathin (1.6 nm) nitride/oxide gate stacks with bottom oxide materials and post-deposition treatment Ieee Transactions On Electron Devices. 48: 2769-2776. DOI: 10.1109/16.974702 |
0.302 |
|
2001 |
Chen C, Fang Y, Yang C, Ting S, Tsair Y, Wang M, Chen S, Yu C, Liang M. Effects of post-deposition treatments on ultrathin nitride/oxide gate stack prepared by RTCVD for ULSI devices Solid-State Electronics. 45: 461-465. DOI: 10.1016/S0038-1101(01)00019-3 |
0.327 |
|
Show low-probability matches. |