Year |
Citation |
Score |
2017 |
Guerra R, Martel E, Khan J, Lopez S, Athanas P, Sarmiento R. On the Evaluation of Different High-Performance Computing Platforms for Hyperspectral Imaging: An OpenCL-Based Approach Ieee Journal of Selected Topics in Applied Earth Observations and Remote Sensing. 10: 4879-4897. DOI: 10.1109/Jstars.2017.2737958 |
0.401 |
|
2017 |
Sohanghpurwala AA, Hassan MW, Athanas P. Hardware accelerated SAT solvers—A survey Journal of Parallel and Distributed Computing. 106: 170-184. DOI: 10.1016/J.Jpdc.2016.12.014 |
0.325 |
|
2014 |
Durbeck LJK, Athanas PM, Macias NJ. Secure-by-construction composable componentry for network processing Acm International Conference Proceeding Series. DOI: 10.1145/2600176.2600203 |
0.741 |
|
2014 |
Frangieh T, Athanas P. A design assembly framework for FPGA back-end acceleration Microprocessors and Microsystems. 38: 889-898. DOI: 10.1016/J.Micpro.2014.02.008 |
0.437 |
|
2012 |
Surís JA, Recio A, Athanas P. RapidRadio: Signal classification and radio deployment framework Transactions On Embedded Computing Systems. 11. DOI: 10.1145/2331147.2331151 |
0.577 |
|
2010 |
Craven S, Athanas P. Dynamically reconfigurable radios from a high-level specification Ieee Aerospace and Electronic Systems Magazine. 25: 35-38. DOI: 10.1109/Maes.2010.5442152 |
0.751 |
|
2010 |
Shelburne M, Patterson C, Athanas P, Jones M, Martin B, Fong R. MetaWire: Using FPGA configuration circuitry to emulate a network-on-chip Iet Computers and Digital Techniques. 4: 159-169. DOI: 10.1049/Iet-Cdt.2009.0009 |
0.357 |
|
2009 |
Patterson C, Athanas P, Shelburne M, Bowen J, Surís J, Dunham T, Rice J. Slotless module-based reconfiguration of embedded FPGAs Acm Transactions in Embedded Computing Systems. 9: 6. DOI: 10.1145/1596532.1596538 |
0.481 |
|
2009 |
Macias NJ, Athanas PM. Architecturally-enforced InfoSec in a general-purpose self-configurable system 2009 International Symposium On Bio-Inspired, Learning, and Intelligent Systems For Security, Bliss 2009. 71-76. DOI: 10.1109/BLISS.2009.14 |
0.754 |
|
2008 |
Craven SD, Athanas PM. Dynamic Hardware Development International Journal of Reconfigurable Computing. 2008: 1-10. DOI: 10.1155/2008/901328 |
0.748 |
|
2007 |
Craven S, Athanas P. Examining the viability of FPGA supercomputing Eurasip Journal On Embedded Systems. 2007: 13-13. DOI: 10.1155/2007/93652 |
0.736 |
|
2007 |
Macias NJ, Athanas PM. Application of self-configurability for autonomous, highly-localized self-regulation Proceedings - 2007 Nasa/Esa Conference On Adaptive Hardware and Systems, Ahs-2007. 397-404. DOI: 10.1109/AHS.2007.32 |
0.705 |
|
2006 |
Mahar AJ, Athanas PM, Craven SD, Edmison JN, Graf J. Design and characterization of a hardware encryption management unit for secure computing platforms Proceedings of the Annual Hawaii International Conference On System Sciences. 10. DOI: 10.1109/HICSS.2006.114 |
0.762 |
|
2005 |
Ma J, Athanas PM, Huang X. INCREMENTAL DESIGN METHODOLOGY FOR MULTIMILLION-GATE FPGAs Journal of Circuits, Systems, and Computers. 14: 1015-1026. DOI: 10.1142/S0218126605002672 |
0.369 |
|
2005 |
Agarwal D, Anderson CR, Athanas PM. An 8 GHz ultra wideband transceiver prototyping testbed Proceedings of the International Workshop On Rapid System Prototyping. 121-127. DOI: 10.1109/RSP.2005.12 |
0.335 |
|
2003 |
Srikanteswara S, Palat RC, Reed JH, Athanas P. An overview of configurable computing machines for software radio handsets Ieee Communications Magazine. 41: 134-141. DOI: 10.1109/Mcom.2003.1215650 |
0.51 |
|
2003 |
Puttegowda K, Lehn DI, Park JH, Athanas P, Jones M. Context Switching in a Run-Time Reconfigurable System The Journal of Supercomputing. 26: 239-257. DOI: 10.1023/A:1025694914489 |
0.368 |
|
2000 |
Srikanteswara S, Reed JH, Athanas P, Boyle R. A soft radio architecture for reconfigurable platforms Ieee Communications Magazine. 38: 140-147. DOI: 10.1109/35.819908 |
0.452 |
|
2000 |
Srikanteswara S, Reed JH, Athanas PM. Implementation of a reconfigurable soft radio using the layered radio architecture Conference Record of the Asilomar Conference On Signals, Systems and Computers. 1: 360-364. |
0.406 |
|
1999 |
Lee DC, Jones MT, Midkiff SF, Athanas PM. Towards active hardware Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 1653: 180-188. DOI: 10.1007/978-3-540-48507-0_16 |
0.449 |
|
1999 |
Hess JR, Lee DC, Harper SJ, Jones MT, Athanas PM. Implementation and evaluation of a prototype reconfigurable router Ieee Symposium On Fpgas For Custom Computing Machines, Proceedings. 44-51. |
0.318 |
|
1999 |
Lee DC, Harper SJ, Athanas PM, Midkiff SF. A stream-based reconfigurable router prototype Ieee International Conference On Communications. 1: 581-585. |
0.41 |
|
1997 |
Paar KJ, Athanas PM. Accelerating finite-difference analysis simulations with a configurable computing machine Microprocessors and Microsystems. 21: 223-235. DOI: 10.1016/S0141-9331(97)00044-6 |
0.409 |
|
1996 |
Paar K, Athanas PM, Edwards CM. Implementation of a finite difference method on a custom computing platform Proceedings of Spie. 2914: 44-53. DOI: 10.1117/12.255834 |
0.341 |
|
1996 |
Peterson JB, Athanas PM. Resource pools: an abstraction for configurable computing codesign* Proceedings of Spie. 2914: 218-224. DOI: 10.1117/12.255819 |
0.474 |
|
1996 |
Bittner R, Athanas PM, Musgrove M. Colt: an experiment in wormhole run-time reconfiguration Proceedings of Spie. 2914: 187-194. DOI: 10.1117/12.255815 |
0.453 |
|
1996 |
Peterson JB, Athanas PM. High-Speed 2-D Convolution with a Custom Computing Machine Journal of Vlsi Signal Processing Systems For Signal, Image, and Video Technology. 12: 7-19. |
0.314 |
|
1995 |
Athanas PM, Abbott AL. Real-Time Image Processing on a Custom Computing Platform Computer. 28: 16-25. DOI: 10.1109/2.347995 |
0.351 |
|
1993 |
Athanas PM, Silverman HF. Processor Reconfiguration Through Instruction-Set Metamorphosis Computer. 26: 11-18. DOI: 10.1109/2.204677 |
0.38 |
|
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