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Cheng Zhuo, Ph.D. - Publications

Affiliations: 
2011 University of Michigan, Ann Arbor, Ann Arbor, MI 
Area:
Computer Engineering, Chemical Engineering
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28 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Yin X, Li C, Huang Q, Zhang L, Niemier M, Hu XS, Zhuo C, Ni K. FeCAM: A Universal Compact Digital and Analog Content Addressable Memory Using Ferroelectric Ieee Transactions On Electron Devices. 67: 2785-2792. DOI: 10.1109/Ted.2020.2994896  0.342
2020 Gao D, Reis D, Hu XS, Zhuo C. Eva-CiM: A System-Level Performance and Energy Evaluation Framework for Computing-in-Memory Architectures Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 1-1. DOI: 10.1109/Tcad.2020.2966484  0.321
2020 Zhuo C, Luo S, Gan H, Hu J, Shi Z. Noise-Aware DVFS for Efficient Transitions on Battery-Powered IoT Devices Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 39: 1498-1510. DOI: 10.1109/Tcad.2019.2917844  0.332
2020 Tida UR, Zhuo C, Liu L, Shi Y. Dynamic Frequency Scaling Aware Opportunistic Through-Silicon-Via Inductor Utilization in Resonant Clocking Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 39: 281-293. DOI: 10.1109/Tcad.2018.2887053  0.333
2020 Wang L, Wang L, Zhuo C, Zhou P. Early-Stage Planning of Switched-Capacitor Converters in a Heterogeneous Chip Ieee Access. 8: 85900-85911. DOI: 10.1109/Access.2020.2986335  0.325
2019 Tida UR, Zhuo C, Shi Y. Single-Inductor–Multiple-Tier Regulation: TSV-Inductor-Based On-Chip Buck Converters for 3-D IC Power Delivery Ieee Transactions On Very Large Scale Integration Systems. 27: 2305-2316. DOI: 10.1109/Tvlsi.2019.2919606  0.348
2019 Li Y, Zhuo C, Zhou P. A Cross-Layer Framework for Temporal Power and Supply Noise Prediction Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 1914-1927. DOI: 10.1109/Tcad.2018.2871820  0.337
2019 Zhuo C, Unda K, Shi Y, Shih W. From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 1291-1304. DOI: 10.1109/Tcad.2018.2834438  0.337
2019 Dong S, Ji W, Yao H, Zhuo C. Early-stage microfluidic network design framework using graph sparsificiation based optimisation Electronics Letters. 55: 1034-1037. DOI: 10.1049/El.2019.1656  0.308
2019 Li D, Xu X, Liu L, Zhang L, Zhuo C, Shi Y. Optimal design of a low-power, phase-switching modulator for implantable medical applications Integration. 69: 289-300. DOI: 10.1016/J.Vlsi.2019.02.003  0.353
2019 Wang L, Zhuo C, Zhou P. Run-time demand estimation and modulation of on-chip decaps at system level for leakage power reduction in multicore chips Integration. 65: 322-330. DOI: 10.1016/J.Vlsi.2018.01.009  0.376
2018 Liu Z, Luo S, Xu X, Shi Y, Zhuo C. A Multi-Level-Optimization Framework for FPGA-Based Cellular Neural Network Implementation Acm Journal On Emerging Technologies in Computing Systems. 14: 47. DOI: 10.1145/3273957  0.362
2018 Yu W, Xu Z, Li B, Zhuo C. Floating Random Walk-Based Capacitance Simulation Considering General Floating Metals Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 1711-1715. DOI: 10.1109/Tcad.2017.2782770  0.359
2018 Chen B, Zhuo C, Shi Y. A physics-aware methodology for equivalent circuit model extraction of TSV-inductors Integration. 63: 160-166. DOI: 10.1016/J.Vlsi.2018.07.002  0.357
2017 Li Y, Li Y, Min Q, Wu K, Liu E, Hao R, Chen H, Zhuo C, Yin W, Wang Z, Yu H, Li E. Electromagnetic Characteristics of Multiport TSVs Using L-2L De-Embedding Method and Shielding TSVs Ieee Transactions On Electromagnetic Compatibility. 59: 1541-1548. DOI: 10.1109/Temc.2017.2664047  0.304
2017 Zhuo C, Chen B. System-level design consideration and optimization of through-silicon-via inductor Integration. 65: 362-369. DOI: 10.1016/J.Vlsi.2017.07.002  0.383
2017 Wu P, Mak W, Wang T, Zhuo C, Unda K, Shi Y. A routing framework for technology migration with bump encroachment Integration. 58: 1-8. DOI: 10.1016/J.Vlsi.2017.01.003  0.36
2015 Zhuo C, Gan H, Shih WK, Aydiner AA. A cross-layer approach for early-stage power grid design and optimization Acm Journal On Emerging Technologies in Computing Systems. 12. DOI: 10.1145/2700246  0.346
2015 Zhuo C, Wilke G, Chakraborty R, Aydiner AA, Chakravarty S, Shih WK. Silicon-Validated Power Delivery Modeling and Analysis on a 32-nm DDR I/O Interface Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 1760-1771. DOI: 10.1109/Tvlsi.2014.2355230  0.344
2014 Tida UR, Yang R, Zhuo C, Shi Y. On the Efficacy of Through-Silicon-Via Inductors Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. DOI: 10.1109/Tvlsi.2014.2338862  0.367
2013 Zhuo C, Sylvester D, Blaauw D. A statistical framework for post-fabrication oxide breakdown reliability prediction and management Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 32: 630-643. DOI: 10.1109/Tcad.2012.2228303  0.559
2011 Zhuo C, Chopra K, Sylvester D, Blaauw D. Process Variation and Temperature-Aware Full Chip Oxide Breakdown Reliability Analysis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 30: 1321-1334. DOI: 10.1109/Tcad.2011.2142183  0.537
2010 Zhuo C, Sylvester D, Blaauw D. Process variation and temperature-aware reliability management Proceedings -Design, Automation and Test in Europe, Date. 580-585.  0.487
2009 Singh P, Zhuo C, Blaauw D, Sylvester D, Karl E. Sensor-driven reliability and wearout management Ieee Design and Test of Computers. 26: 40-48. DOI: 10.1109/Mdt.2009.155  0.557
2009 Zhuo C, Blaauw D, Sylvester D. Post-fabrication measurement-driven oxide breakdown reliability prediction and management Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 441-448.  0.517
2008 Wang Y, Zhuo C, Deng J, Zhou J, Chen K. In-package P/G planes analysis and optimization based on transmission matrix method Journal of Zhejiang University Science. 9: 849-857. DOI: 10.1631/Jzus.A071489  0.331
2008 Zhuo C, Blaauw D, Sylvester D. Variation-aware gate sizing and clustering for post-silicon optimized circuits Proceedings of the International Symposium On Low Power Electronics and Design. 105-110. DOI: 10.1145/1393921.1393949  0.463
2008 Zhuo C, Hu J, Zhao M, Chen K. Power Grid Analysis and Optimization Using Algebraic Multigrid Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 738-751. DOI: 10.1109/Tcad.2008.917587  0.363
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