Year |
Citation |
Score |
2019 |
Badawi D, Ayhan T, Ozev S, Yang C, Orailoglu A, Çetin AE. Detecting Gas Vapor Leaks Using Uncalibrated Sensors Ieee Access. 7: 155701-155710. DOI: 10.1109/Access.2019.2949740 |
0.591 |
|
2018 |
Rozo L, Landwehr AM, Zheng Y, Yang C, Gao G. Reliability-Aware Runtime Adaption Through a Statically Generated Task Schedule Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 26: 11-22. DOI: 10.1109/Tvlsi.2017.2753242 |
0.349 |
|
2018 |
Meng F, Xue Y, Yang C. Power- and Endurance-Aware Neural Network Training in NVM-Based Platforms Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 2709-2719. DOI: 10.1109/Tcad.2018.2858360 |
0.319 |
|
2018 |
Cronin P, Hosseini FS, Yang C. A Low Overhead Solution to Resilient Assembly Lines Built From Legacy Controllers Ieee Embedded Systems Letters. 10: 103-106. DOI: 10.1109/Les.2018.2829768 |
0.356 |
|
2017 |
Khouzani HA, Yang C. A DWM-Based Stack Architecture Implementation for Energy Harvesting Systems Acm Transactions in Embedded Computing Systems. 16: 155. DOI: 10.1145/3126543 |
0.339 |
|
2017 |
Pan C, Xie M, Yang C, Chen Y, Hu J. Exploiting Multiple Write Modes of Nonvolatile Main Memory in Embedded Systems Acm Transactions in Embedded Computing Systems. 16: 110. DOI: 10.1145/3063130 |
0.337 |
|
2017 |
Khouzani HA, Hosseini FS, Yang C. Segment and Conflict Aware Page Allocation and Migration in DRAM-PCM Hybrid Main Memory Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 36: 1458-1470. DOI: 10.1109/Tcad.2016.2615845 |
0.315 |
|
2017 |
Xue Y, Yang C. Path reuse-aware routing for non-volatile memory based FPGAs Integration. 58: 505-517. DOI: 10.1016/J.Vlsi.2016.10.005 |
0.358 |
|
2016 |
Khouzani HA, Xue Y, Yang C. Fully Exploiting PCM Write Capacity Within Near Zero Cost Through Segment-Based Page Allocation Acm Journal On Emerging Technologies in Computing Systems. 12: 1-26. DOI: 10.1145/2856423 |
0.338 |
|
2014 |
Shi L, Li J, Li Q, Xue CJ, Yang C, Zhou X. A Unified Write Buffer Cache Management Scheme for Flash Memory Ieee Transactions On Very Large Scale Integration Systems. 22: 2779-2792. DOI: 10.1109/Tvlsi.2013.2294462 |
0.321 |
|
2014 |
Liu C, Rajendran J, Yang C, Karri R. Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security- Driven Task Scheduling Ieee Transactions On Emerging Topics in Computing. 2: 461-472. DOI: 10.1109/Tetc.2014.2348182 |
0.539 |
|
2012 |
Yang C, Orailoglu A. Tackling resource variations through adaptive multicore execution frameworks Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 31: 132-145. DOI: 10.1109/Tcad.2011.2166829 |
0.562 |
|
2011 |
Yang C, Orailoglu A. Full fault resilience and relaxed synchronization requirements at the cache-memory interface Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 19: 1996-2009. DOI: 10.1109/Tvlsi.2010.2067230 |
0.521 |
|
2011 |
Rao W, Yang C, Karri R, Orailoglu A. Toward Future Systems with Nanoscale Devices: Overcoming the Reliability Challenge Computer. 44: 46-53. DOI: 10.1109/Mc.2011.1 |
0.617 |
|
2011 |
Zhang Y, Xue CJ, Yang C, Orailoglu A. Migration-aware adaptive MPSoC static schedules with dynamic reconfigurability Journal of Parallel and Distributed Computing. 71: 1400-1410. DOI: 10.1016/J.Jpdc.2011.06.006 |
0.544 |
|
2010 |
Yang C, Chen M, Orailoglu A. Squashing code size in microcoded IPs while delivering high decompression speed Design Automation For Embedded Systems. 14: 265-284. DOI: 10.1007/S10617-010-9057-Z |
0.598 |
|
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