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Glenn Reinman - Publications

Affiliations: 
Computer Science University of California, Los Angeles, Los Angeles, CA 
Area:
processor architecture design and optimization; speculative execution; profile-guided optimization; finding and exploiting instruction-level parallelism
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52 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2019 Choi Y, Cong J, Fang Z, Hao Y, Reinman G, Wei P. In-Depth Analysis on Microarchitectures of Modern Heterogeneous CPU-FPGA Platforms Acm Transactions On Reconfigurable Technology and Systems. 12: 1-20. DOI: 10.1145/3294054  0.5
2017 Chen R, Reinman G. CHILL: a system for fine-grained mapping of chained high impact long-latency load phases on tightly coupled heterogeneous multi-cores International Journal of High Performance Systems Architecture. 7: 1. DOI: 10.1504/Ijhpsa.2017.10004503  0.374
2016 Cong J, Fang Z, Gill M, Reinman G. PARADE: A cycle-accurate full-system simulation Platform for Accelerator-Rich Architectural Design and Exploration 2015 Ieee/Acm International Conference On Computer-Aided Design, Iccad 2015. 380-387. DOI: 10.1109/ICCAD.2015.7372595  0.365
2015 Grigorian B, Reinman G. Accelerating divergent applications on simd architectures using neural networks Acm Transactions On Architecture and Code Optimization. 12. DOI: 10.1145/2717311  0.781
2015 Grigorian B, Farahpour N, Reinman G. BRAINIAC: Bringing reliable accuracy into neurally-implemented approximate computing 2015 Ieee 21st International Symposium On High Performance Computer Architecture, Hpca 2015. 615-626. DOI: 10.1109/HPCA.2015.7056067  0.789
2014 Cong J, Grigorian B, Ghodrat MA, Gururaj K, Gill M, Reinman G. Accelerator-rich architectures: Opportunities and progresses Proceedings - Design Automation Conference. DOI: 10.1145/2593069.2596667  0.801
2014 Cong J, Ghodrat MA, Gill M, Grigorian B, Reinman G. Architecture support for domain-specific accelerator-rich CMPs Transactions On Embedded Computing Systems. 13. DOI: 10.1145/2584664  0.802
2014 Grigorian B, Reinman G. Dynamically adaptive and reliable approximate computing using light-weight error analysis Proceedings of the 2014 Nasa/Esa Conference On Adaptive Hardware and Systems, Ahs 2014. 248-255. DOI: 10.1109/AHS.2014.6880184  0.764
2013 Cong J, Ghodrat MA, Gill M, Grigorian B, Huang H, Reinman G. Composable accelerator-rich microprocessor enhanced for adaptivity and longevity Proceedings of the International Symposium On Low Power Electronics and Design. 305-310. DOI: 10.1109/ISLPED.2013.6629314  0.784
2012 Cong J, Ghodrat MA, Gill M, Grigorian B, Reinman G. CHARM: A composable heterogeneous accelerator-rich microprocessor Proceedings of the International Symposium On Low Power Electronics and Design. 379-384. DOI: 10.1145/2333660.2333747  0.783
2012 Cong J, Ghodrat MA, Gill M, Grigorian B, Reinman G. Architecture support for accelerator-rich CMPs Proceedings - Design Automation Conference. 843-849. DOI: 10.1145/2228360.2228512  0.801
2012 Therdsteerasukdi K, Byun G, Cong J, Chang MF, Reinman G. Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system Transactions On Architecture and Code Optimization. 8. DOI: 10.1145/2086696.2086730  0.753
2012 Therdsteerasukdi K, Byun GS, Ir J, Reinman G, Cong J, Chang MCF. Utilizing radio-frequency interconnect for a many-DIMM DRAM system Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 2: 210-227. DOI: 10.1109/Jetcas.2012.2193843  0.761
2012 Kim Y, Tam SW, Byun GS, Wu H, Nan L, Reinman G, Cong J, Chang MCF. Analysis of noncoherent ASK modulation-based RF-interconnect for memory interface Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 2: 200-209. DOI: 10.1109/Jetcas.2012.2193511  0.394
2012 Kapadia M, Singh S, Hewlett W, Reinman G, Faloutsos P. Parallelized egocentric fields for autonomous navigation Visual Computer. 28: 1209-1227. DOI: 10.1007/S00371-011-0669-5  0.706
2012 Chen YT, Cong J, Huang H, Liu B, Liu C, Potkonjak M, Reinman G. Dynamically reconfigurable hybrid cache: An energy-efficient last-level cache design Proceedings -Design, Automation and Test in Europe, Date. 45-50.  0.384
2011 Kapadia M, Singh S, Reinman G, Faloutsos P. A behavior-authoring framework for multiactor simulations. Ieee Computer Graphics and Applications. 31: 45-55. PMID 24808258 DOI: 10.1109/Mcg.2011.68  0.683
2011 Chen YT, Cong J, Reinman G. HC-Sim: A fast and exact L1 cache simulator with scratchpad memory co-simulation support Embedded Systems Week 2011, Esweek 2011 - Proceedings of the 9th Ieee/Acm/Ifip International Conference On Hardware/Software Codesign and System Synthesis, Codes+Isss'11. 295-304. DOI: 10.1145/2039370.2039416  0.308
2011 Cong J, Reinman G, Bui A, Sarkar V. Customizable domain-specific computing Ieee Design and Test of Computers. 28: 6-14. DOI: 10.1109/Mdt.2010.141  0.42
2011 Cong J, Gururaj K, Huang H, Liu C, Reinman G, Zou Y. An energy-efficient adaptive hybrid cache Proceedings of the International Symposium On Low Power Electronics and Design. 67-72. DOI: 10.1109/ISLPED.2011.5993609  0.349
2011 Therdsteerasukdi K, Byun GS, Ir J, Reinman G, Cong J, Chang MF. The DIMM tree architecture: A high bandwidth and scalable memory system Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 388-395. DOI: 10.1109/ICCD.2011.6081428  0.769
2011 Cong J, Grigorian B, Reinman G, Vitanza M. Accelerating vision and navigation applications on a customizable platform Proceedings of the International Conference On Application-Specific Systems, Architectures and Processors. 25-32. DOI: 10.1109/ASAP.2011.6043233  0.79
2011 Tam SW, Socher E, Chang MCF, Cong J, Reinman GD. RF-interconnect for future network-on-chip Low Power Networks-On-Chip. 255-280. DOI: 10.1007/978-1-4419-6911-8_10  0.308
2011 Singh S, Kapadia M, Reinman G, Faloutsos P. Footstep navigation for dynamic crowds Computer Animation and Virtual Worlds. 22: 151-158. DOI: 10.1002/Cav.403  0.691
2009 Yeh TY, Reinman G, Patel SJ, Faloutsos P. Fool me twice: Exploring and exploiting error tolerance in physics-based animation Acm Transactions On Graphics. 29. DOI: 10.1145/1640443.1640448  0.614
2008 Ma Y, Liu Y, Kursun E, Reinman G, Cong J. Investigating the effects of fine-grain three-dimensional integration on microarchitecture design Acm Journal On Emerging Technologies in Computing Systems. 4. DOI: 10.1145/1412587.1412590  0.745
2008 Chang MCF, Socher E, Tam SW, Cong J, Reinman G. RF interconnects for communications on-chip Proceedings of the International Symposium On Physical Design. 78-83. DOI: 10.1145/1353629.1353649  0.314
2008 Chang MCF, Cong J, Kaplan A, Liu C, Naik M, Premkumar J, Reinman G, Socher E, Tam SW. Power reduction of CMP communication networks via rf-interconnects Proceedings of the Annual International Symposium On Microarchitecture, Micro. 376-387. DOI: 10.1109/MICRO.2008.4771806  0.321
2008 Cong J, Gururaj K, Han G, Kaplan A, Naik M, Reinman G. MC-sim: An efficient simulation tool for MPSoC designs Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 364-371. DOI: 10.1109/ICCAD.2008.4681599  0.322
2007 Yeh TY, Faloutsos P, Patel SJ, Reinman G. ParallAX: An architecture for real-time physics Proceedings - International Symposium On Computer Architecture. 232-243. DOI: 10.1145/1250662.1250691  0.321
2007 Cong J, Han G, Jagannathan A, Reinman G, Rutkowski K. Accelerating sequential applications on CMPs using core spilling Ieee Transactions On Parallel and Distributed Systems. 18: 1094-1107. DOI: 10.1109/Tpds.2007.1085  0.481
2007 Yeh TY, Faloutsos P, Ercegovac M, Patel SJ, Reinman G. The art of deception: Adaptive precision reduction for area efficient physics acceleration Proceedings of the Annual International Symposium On Microarchitecture, Micro. 394-406. DOI: 10.1109/MICRO.2007.9  0.318
2007 Liu Y, Ma Y, Kursun E, Reinman G, Cong J. Fine grain 3D integration for microarchitecture design through cube packing exploration 2007 Ieee International Conference On Computer Design, Iccd 2007. 259-266. DOI: 10.1109/ICCD.2007.4601911  0.636
2007 Cong J, Kursun E, Liu Y, Ma Y, Reinman G. 3D architecture modeling and exploration 2007 Proceedings - 24th International Vlsi Multilevel Interconnection Conference, Vmic 2007. 231-238.  0.688
2006 Shayesteh A, Reinman G, Jouppi N, Sherwood T, Sair S. Improving the performance and power efficiency of shared helpers in CMPs Cases 2006: International Conference On Compilers, Architecture and Synthesis For Embedded Systems. 345-356. DOI: 10.1145/1176760.1176802  0.707
2006 Reinman G, Pitigoi-Aron G. Trace cache miss tolerance for deeply pipelined superscalar processors Iee Proceedings: Computers and Digital Techniques. 153: 355-361. DOI: 10.1049/ip-cdt:20050161  0.358
2006 Moshnyaga VG, Vo H, Reinman G, Potkonjak M. Handheld system energy reduction by OS-driven refresh Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 4148: 24-35. DOI: 10.1007/11847083  0.406
2006 Kursun E, Shayesteh A, Sair S, Sherwood T, Reinman G. An evaluation of deeply decoupled cores Journal of Instruction-Level Parallelism. 8: 1-21.  0.776
2005 Shayesteh A, Reinman G, Jouppi N, Sair S, Sherwood T. Dynamically configurable shared CMP helper engines for improved performance Acm Sigarch Computer Architecture News. 33: 70-79. DOI: 10.1145/1105734.1105744  0.69
2005 Reinman G. Using an operand file to save energy and to decouple commit resources Iee Proceedings: Computers and Digital Techniques. 152: 666-678. DOI: 10.1049/ip-cdt:20045099  0.368
2005 Kursun E, Reinman G, Sair S, Shayesteh A, Sherwood T. Low-overhead core swapping for thermal management Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 3471: 46-60. DOI: 10.1007/11574859_4  0.773
2005 Liu Y, Shayesteh A, Memik G, Reinman G. Tornado warning: The perils of selective replay in multithreaded processors Proceedings of the International Conference On Supercomputing. 51-60.  0.579
2005 Memik G, Reinman G, Mangione-Smith WH. Precise instruction scheduling Journal of Instruction-Level Parallelism. 7.  0.304
2005 Cong J, Fan Y, Han G, Jagannathan A, Reinman G, Zhang Z. Instruction set extension with shadow registers for configurable processors Acm/Sigda International Symposium On Field Programmable Gate Arrays - Fpga. 99-106.  0.368
2005 Jagannathan A, Yang HH, Konigsfeld K, Milliron D, Mohan M, Romesis M, Reinman G, Cong J. Microarchitecture evaluation with floorplanning and interconnect pipelining Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 1: I8-I15.  0.342
2005 Yeh TY, Reinman G. Fast and fair: Data-stream quality of service Cases 2005: International Conference On Compilers, Architecture, and Synthesis For Embedded Systems. 237-248.  0.334
2004 Reinman G, Calder B. Using a serial cache for energy efficient instruction fetching Journal of Systems Architecture. 50: 675-685. DOI: 10.1016/J.Sysarc.2004.02.004  0.429
2004 Liu Y, Shayesteh A, Memik G, Reinman G. Scaling the issue window with look-ahead latency prediction Proceedings of the International Conference On Supercomputing. 217-226.  0.625
2003 Memik G, Reinman G, Mangione-Smith WH. Just say no: Benefits of early cache miss determination Proceedings - International Symposium On High-Performance Computer Architecture. 12: 307-316. DOI: 10.1109/HPCA.2003.1183548  0.342
2003 Memik G, Reinman G, Mangione-Smith WH. Reducing Energy and Delay Using Efficient Victim Caches Proceedings of the International Symposium On Low Power Electronics and Design. 262-265.  0.328
2002 Reinman G, Calder B, Austin T. High performance and energy efficient serial prefetch architecture Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 2327: 146-159. DOI: 10.1007/3-540-47847-7_14  0.336
2001 Reinman G, Calder B, Austin T. Optimizations enabled by a decoupled front-end architecture Ieee Transactions On Computers. 50: 338-355. DOI: 10.1109/12.919279  0.435
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