Year |
Citation |
Score |
2019 |
Huang B, Zhang H, Subramanyan P, Vizel Y, Gupta A, Malik S. Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification Acm Transactions On Design Automation of Electronic Systems. 24: 10. DOI: 10.1145/3282444 |
0.357 |
|
2018 |
Subramanyan P, Huang B, Vizel Y, Gupta A, Malik S. Template-Based Parameterized Synthesis of Uniform Instruction-Level Abstractions for SoC Verification Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 1692-1705. DOI: 10.1109/Tcad.2017.2764482 |
0.36 |
|
2013 |
Kahlon V, Sankaranarayanan S, Gupta A. Static analysis for concurrent programs with applications to data race detection International Journal On Software Tools For Technology Transfer. 15: 321-336. DOI: 10.1007/S10009-013-0274-1 |
0.325 |
|
2011 |
Wang C, Kundu S, Limaye R, Ganai M, Gupta A. Symbolic predictive analysis for concurrent programs Formal Aspects of Computing. 23: 781-805. DOI: 10.1007/S00165-011-0179-2 |
0.314 |
|
2009 |
Yang Z, Wang C, Gupta A, Ivančić F. Model checking sequential software programs via mixed symbolic analysis Acm Transactions On Design Automation of Electronic Systems. 14: 10. DOI: 10.1145/1455229.1455239 |
0.328 |
|
2008 |
Zaks A, Yang Z, Shlyakhter I, Ivančić F, Cadambi S, Ganai MK, Gupta A, Ashar P. Bitwidth reduction via symbolic interval analysis for software model checking Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 1513-1517. DOI: 10.1109/Tcad.2008.925777 |
0.348 |
|
2007 |
Ganai MK, Talupur M, Gupta A. SDSAT: Tight Integration of Small Domain Encoding and Lazy Approaches in Solving Difference Logic Journal On Satisfiability, Boolean Modeling and Computation. 3: 91-114. DOI: 10.3233/Sat190031 |
0.309 |
|
2007 |
Wang C, Yang Z, Ivančić F, Gupta A. Disjunctive image computation for software verification Acm Transactions On Design Automation of Electronic Systems. 12: 10. DOI: 10.1145/1230800.1230802 |
0.352 |
|
2005 |
Prasad MR, Biere A, Gupta A. A survey of recent advances in SAT-based formal verification International Journal On Software Tools For Technology Transfer. 7: 156-173. DOI: 10.1007/S10009-004-0183-4 |
0.324 |
|
2004 |
Clarke EM, Gupta A, Strichman O. SAT-based counterexample-guided abstraction refinement Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 1113-1123. DOI: 10.1109/Tcad.2004.829807 |
0.329 |
|
2002 |
Gupta A. Assertion-based verification turns the corner Ieee Design & Test of Computers. 19: 131-132. DOI: 10.1109/Mdt.2002.10025 |
0.328 |
|
1999 |
Gupta A, Ashar P, Malik S. Exploiting Retiming in a Guided Simulation Based Validation Methodology Lecture Notes in Computer Science. 350-353. DOI: 10.1007/3-540-48153-2_32 |
0.305 |
|
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