Area:
Electronics and Electrical Engineering
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High-probability grants
According to our matching algorithm, Bharat L. Bhuva is the likely recipient of the following grants.
| Years |
Recipients |
Code |
Title / Keywords |
Matching
score |
| 1988 — 1991 |
Bhuva, Bharat |
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information |
Research Initiation: Development of Testing and Simulation Methodologies For Infant Failure and Field-Yield Estimationfor Mos Vlsi/Ulsi Circuits
New switch-level approaches for fast and efficient simulation of MOS IC's are to be formulated in order to estimate "infant" (i.e., early) failures and to estimate field yield in large chips. The simulation scheme is also expected to identify the critical sub-section of circuits that cause early failures and should help in redesigning for greater robustness.
|
0.915 |
| 2012 — 2013 |
Bhuva, Bharat
Massengill, Lloyd (co-PI) [⬀]
Schrimpf, Ronald (co-PI) [⬀]
Robinson, William (co-PI) [⬀]
Reed, Robert |
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information |
Planning Grant: I/Ucrc For Integrated Design-For-Reliability For Electronics
I/UCRC for Integrated Design-for-Reliability for Electronics (iDRE)
1160865 University of California-Riverside; Albert Wang
1160870 Vanderbilt University; Bharat Bhuva
The University of California-Riverside (UC-R) and Vanderbilt University (VU) are collaborating to establish the proposed center, with UC-R as the lead institution.
The Center for Integrated Design-for-Reliability for Electronics (iDRE) will conduct research on investigating radiation and transient electrostatic discharge (ESD) induced failures to integrated circuits (IC), multi-chip nodules (MCM) and system-in-package (SiP), and microelectronics systems; as well as developing reliability solutions by integrated designs for industrial electronics. An additional objective of the planning grant proposal is to hold a meeting with potential industrial partners to discuss the research needs for integrated design-for-reliability (DfR) and center operation mechanisms.
If successful, research activities at the iDRE Center will reveal fundamentals and mechanisms of ESD and soft error failures, as well as deliver ESD protection and soft error mitigation solutions to advanced ICs and systems. The research outcomes will cast huge impacts on modern microelectronics and system products, and will have significant benefits to the electronic industry and the nation's economy. The proposed integrated DfR reliability solutions will affect all aspects of human lives, from communications and entertainment, to information processing and storage, to life-threatening devices and mission-critical tasks, and so on. The PIs also propose a diversity plan to promote involvement of female and underrepresented minority students in engineering education and research.
|
0.915 |