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Na Gong, Ph.D. - Publications

Affiliations: 
2013 Computer Science and Engineering State University of New York, Buffalo, Buffalo, NY, United States 
Area:
Computer Engineering
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19 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2019 Edstrom J, Chen D, Gong Y, Wang J, Gong N. Data-Pattern Enabled Self-Recovery Low-Power Storage System for Big Video Data Ieee Transactions On Big Data. 5: 95-105. DOI: 10.1109/Tbdata.2017.2750699  0.413
2018 Chen X, Pourbakhsh SA, Fu J, Gong N, Wang J. A Novel Hybrid Delay Unit Based on Dummy TSVs for 3-D On-Chip Memory Ieee Transactions On Very Large Scale Integration Systems. 26: 1277-1289. DOI: 10.1109/Tvlsi.2018.2809961  0.375
2018 Chen D, Edstrom J, Gong Y, Gao P, Yang L, McCourt ME, Wang J, Gong N. Viewer-Aware Intelligent Efficient Mobile Video Embedded Memory Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 26: 684-696. DOI: 10.1109/Tvlsi.2017.2787043  0.432
2017 Gong N, Pourbakhsh SA, Chen X, Wang X, Chen D, Wang J. SPIDER: Sizing-Priority-Based Application-Driven Memory for Mobile Video Applications Ieee Transactions On Very Large Scale Integration Systems. 25: 2625-2634. DOI: 10.1109/Tvlsi.2017.2715002  0.428
2017 Edstrom J, Gong Y, Chen D, Wang J, Gong N. Data-Driven Intelligent Efficient Synaptic Storage for Deep Learning Ieee Transactions On Circuits and Systems Ii-Express Briefs. 64: 1412-1416. DOI: 10.1109/Tcsii.2017.2767900  0.367
2016 Wang J, Wang L, Yin H, Wei Z, Yang Z, Gong N. CNV SRAM: CMOS Technology Compatible Non-Volatile SRAM Based Ultra-Low Leakage Energy Hybrid Memory System Ieee Transactions On Computers. 65: 1055-1067. DOI: 10.1109/Tc.2014.2375187  0.465
2015 Wang J, Gong N, Friedman EG. PNS-FCR: Flexible Charge Recycling Dynamic Circuit Technique for Low-Power Microprocessors Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. DOI: 10.1109/Tvlsi.2015.2419255  0.535
2015 Gong N, Wang J, Jiang S, Sridhar R. TM-RF: Aging-Aware Power-Efficient Register File Design for Modern Microprocessors Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 1196-1209. DOI: 10.1109/Tvlsi.2014.2334136  0.703
2014 Gong N, Wang J, Sridhar R. Variation aware sleep vector selection in dual Vt dynamic or circuits for low leakage register file design Ieee Transactions On Circuits and Systems I: Regular Papers. 61: 1970-1983. DOI: 10.1109/Tcsi.2014.2298280  0.669
2014 Wei Z, Peng X, Wang J, Yin H, Gong N. Novel CMOS SRAM voltage latched sense amplifiers design based on 65 nm technology Proceedings - 2014 Ieee 12th International Conference On Solid-State and Integrated Circuit Technology, Icsict 2014. DOI: 10.1109/ICSICT.2014.7021356  0.378
2014 Zhang J, Wang J, Gong N. Novel bidirectional IO multiplexing circuit design Proceedings - 2014 Ieee 12th International Conference On Solid-State and Integrated Circuit Technology, Icsict 2014. DOI: 10.1109/ICSICT.2014.7021353  0.355
2014 Wang L, Wang J, Yang Z, Hou L, Gong N. A low power CMOS technology compatible non-volatile SRAM cell Proceedings - 2014 Ieee 12th International Conference On Solid-State and Integrated Circuit Technology, Icsict 2014. DOI: 10.1109/ICSICT.2014.7021248  0.311
2012 Gong N, Jiang S, Challapalli A, Fernandes S, Sridhar R. Ultra-Low Voltage Split-Data-Aware Embedded SRAM for Mobile Video Applications Ieee Transactions On Circuits and Systems Ii-Express Briefs. 59: 883-887. DOI: 10.1109/Tcsii.2012.2231018  0.722
2012 Gong N, Wang J, Jiang S, Sridhar R. Clock-biased local bit line for high performance register files Electronics Letters. 48: 1104-1105. DOI: 10.1049/El.2012.0039  0.687
2012 Gong N, Jiang S, Wang J, Aravamudhan B, Sekar K, Sridhar R. Hybrid-cell register files design for improving NBTI reliability Microelectronics Reliability. 52: 1865-1869. DOI: 10.1016/J.Microrel.2012.06.045  0.703
2011 Wang JH, Gong N, Liu G, Geng SQ, Wu WC. Performance Analysis of Dual Vt Domino Circuits with P-V-T Variations Applied Mechanics and Materials. 326-330. DOI: 10.4028/Www.Scientific.Net/Amm.88-89.326  0.487
2011 Wang J, Gong N, Hou L, Peng X, Sridhar R, Wu W. Leakage current, active power, and delay analysis of dynamic dual Vt CMOS circuits under P–V–T fluctuations Microelectronics Reliability. 51: 1498-1502. DOI: 10.1016/J.Microrel.2011.06.011  0.69
2011 Wang J, Gong N, Hou L, Peng X, Geng S, Wu W. Low power and high performance dynamic CMOS XOR/XNOR gate design Microelectronic Engineering. 88: 2781-2784. DOI: 10.1016/J.Mee.2011.02.068  0.47
2008 Gong N, Guo B, Lou J, Wang J. Analysis and optimization of leakage current characteristics in sub-65nm dual Vt footed domino circuits Microelectronics Journal. 39: 1149-1155. DOI: 10.1016/J.Mejo.2008.01.028  0.434
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