☰

Xiaofang Wang, Ph.D. - Publications

Affiliations: 
2005 New Jersey Institute of Technology, Newark, NJ, United States 
Area:
Electronics and Electrical Engineering
Tree Info Similar researchers PubMed Report error

9 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2015 Wang X, Ziavras SG. A multiprocessor-on-a-programmable-chip reconfigurable system for matrix operations with power-grid case studies International Journal of Computational Science and Engineering. 10: 181-191. DOI: 10.1504/IJCSE.2015.067043  0.68
2007 Wang X, Ziavras SG. Performance-energy tradeoffs for matrix multiplication on FPGA-based mixed-mode chip multiprocessors Proceedings - Eighth International Symposium On Quality Electronic Design, Isqed 2007. 386-391. DOI: 10.1109/ISQED.2007.119  0.619
2007 Wang X, Ziavras SG, Nwankpa C, Johnson J, Nagvajara P. Parallel solution of Newton's power flow equations on configurable chips International Journal of Electrical Power and Energy Systems. 29: 422-431. DOI: 10.1016/J.Ijepes.2006.10.006  0.669
2006 Wang X, Ziavras SG, Hu J. System-level energy modeling for heterogeneous reconfigurable chip multiprocessors Ieee International Conference On Computer Design, Iccd 2006. 411-416. DOI: 10.1109/ICCD.2006.4380849  0.621
2006 Wang X, Ziavras SG. Exploiting mixed-mode parallelism for matrix operations on the HERA architecture through reconfiguration Iee Proceedings: Computers and Digital Techniques. 153: 249-260. DOI: 10.1049/ip-cdt:20045136  0.678
2005 Wang X, Ziavras SG. A framework for dynamic resource assignment and scheduling on reconfigurable mixed-mode on-chip multiprocessors Proceedings - 2005 Ieee International Conference On Field Programmable Technology. 2005: 51-58. DOI: 10.1109/FPT.2005.1568524  0.653
2004 Wang X, Ziavras SG. Parallel LU factorization of sparse matrices on FPGA-based configurable computing engines Concurrency Computation Practice and Experience. 16: 319-343. DOI: 10.1002/Cpe.748  0.689
2003 Wang X, Ziavras SG. Parallel direct solution of linear equations on FPGA-based machines Proceedings - International Parallel and Distributed Processing Symposium, Ipdps 2003. DOI: 10.1109/IPDPS.2003.1213224  0.678
2003 Wang X, Ziavras SG. Performance optimization of an FPGA-based configurable multiprocessor for matrix operations Proceedings - 2003 Ieee International Conference On Field-Programmable Technology, Fpt 2003. 303-306. DOI: 10.1109/FPT.2003.1275763  0.678
Show low-probability matches.