Year |
Citation |
Score |
2016 |
Bhattacharya S, Xie F, Baldwin DF, Wu H, Hodge K, Ji Q. Process and Evaluation of High Reliability Reworkable Edge Bond Adhesives for Large Area BGA Applications Additional Conferences (Device Packaging, Hitec, Hiten, and Cicmt). 2016: 002018-002053. DOI: 10.4071/2016DPC-THA24 |
0.317 |
|
2016 |
Fennell B, Lee S, Baldwin DF. Rotational solder self-alignment mechanics modeling for a flip chip in the presence of a viscous fluid Microelectronics Reliability. 65: 217-224. DOI: 10.1016/J.Microrel.2016.07.144 |
0.478 |
|
2015 |
Bhattacharya SK, Lewis B, Wu H, Hodge K, Xie F, Pathammavong K, Houston PN, Baldwin DF. Reliability assessment of thermally compression bonded copper pillar on organic and ceramic substrates Proceedings - Electronic Components and Technology Conference. 2015: 2077-2082. DOI: 10.1109/ECTC.2015.7159889 |
0.315 |
|
2013 |
Lee S, Baldwin DF. Heterogeneous Void Nucleation Study in Flip Chip Assembly Process Using No-Flow Underfill Journal of Electronic Packaging. 136. DOI: 10.1115/1.4026164 |
0.49 |
|
2013 |
Lewis BJ, Baldwin DF, Houston PN, Xie F, La LH. Single chip plated Ni/Pd over ALCAP bond pads for flip chip applications and prototyping Proceedings - Electronic Components and Technology Conference. 1564-1568. DOI: 10.1109/ECTC.2013.6575780 |
0.332 |
|
2012 |
Lewis BJ, Baldwin DF, Houston PN, La Lh, Spark T. Processing, Bumping and Assembly of Single Chip Plated Ni/Pd over ALCAP Bond Pads for Flip Chip Applications and Prototyping Additional Conferences (Device Packaging, Hitec, Hiten, and Cicmt). 2012: 001841-001869. DOI: 10.4071/2012DPC-wp23 |
0.347 |
|
2012 |
Lee S, Yim MJ, Baldwin D. Effect of nano-particles on heterogeneous void nucleation in no-flow underfill materials Ieee Transactions On Components, Packaging and Manufacturing Technology. 2: 1059-1063. DOI: 10.1109/Tcpmt.2012.2191617 |
0.408 |
|
2011 |
Lewis BJ, Baldwin DF, Houston PN, Smith B, Kwok P, Mueller JTA, Racz L. Processing and Reliability Assessment of Silicon Based, Integrated Ultra High Density Substrates Additional Conferences (Device Packaging, Hitec, Hiten, and Cicmt). 2011: 002272-002313. DOI: 10.4071/2011DPC-THA23 |
0.34 |
|
2011 |
Li Z, Lee S, Evans JL, Baldwin DF. Comprehensive study of lead-free reflow process for a 3-D flip chip on silicon package Ieee Transactions On Components, Packaging and Manufacturing Technology. 1: 1856-1863. DOI: 10.1109/Tcpmt.2011.2163314 |
0.44 |
|
2010 |
Lee S, Baldwin DF. High Yield, Near Void-Free Assembly Process of a Flip Chip in Package Using No-Flow Underfill International Symposium On Microelectronics. 2010: 000798-000805. DOI: 10.4071/ISOM-2010-THA2-PAPER3 |
0.403 |
|
2010 |
Li Z, Lee S, Lewis BJ, Houston PN, Baldwin DF, Stout EA, Tessier TG, Evans JL. Assembly process development for fine pitch flip chip silicon-to-silicon 3D wafer level integration with no flow underfill Journal of Microelectronics and Electronic Packaging. 7: 146-151. DOI: 10.4071/Imaps.262 |
0.43 |
|
2010 |
Li Z, Evans JL, Houston PN, Lewis BJ, Baldwin DF, Lee S, Tessier TG, Stout EA. No Flow Underfill Process Development for Fine Pitch Flip Chip Silicon to Silicon Wafer Level Integration Additional Conferences (Device Packaging, Hitec, Hiten, and Cicmt). 2010: 000708-000735. DOI: 10.4071/2010DPC-TA32 |
0.37 |
|
2010 |
Fennell B, Lee S, Baldwin DF. Translation Solder Self-Alignment Mechanics Modeling for a Flip Chip in the Presence of a Viscous Fluid Journal of Electronic Packaging. 132. DOI: 10.1115/1.4002825 |
0.454 |
|
2010 |
Joo S, Baldwin DF. Advanced package prototyping using nano-particle silver printed interconnects Ieee Transactions On Electronics Packaging Manufacturing. 33: 129-134. DOI: 10.1109/Tepm.2010.2044887 |
0.466 |
|
2010 |
Lee S, Zhou HM, Baldwin DF. A numerical study of void nucleation and growth in a flip chip assembly process Modelling and Simulation in Materials Science and Engineering. 18: 065005. DOI: 10.1088/0965-0393/18/6/065005 |
0.47 |
|
2009 |
Lee S, Yim MJ, Baldwin D. Void Formation Mechanism of Flip Chip in Package Using No-Flow Underfill Journal of Electronic Packaging. 131. DOI: 10.1115/1.3153369 |
0.413 |
|
2009 |
Lee S, Yim MJ, Master RN, Wong CP, Baldwin DF. Near Void-Free Assembly Development of Flip Chip Using No-Flow Underfill Ieee Transactions On Electronics Packaging Manufacturing. 32: 106-114. DOI: 10.1109/Tepm.2009.2015592 |
0.456 |
|
2008 |
Lee S, Yim MJ, Master RN, Wong CP, Baldwin DF. Void Formation Study of Flip Chip in Package Using No-Flow Underfill Ieee Transactions On Electronics Packaging Manufacturing. 31: 297-305. DOI: 10.1109/Tepm.2008.2002951 |
0.445 |
|
2008 |
Kim C, Kang SC, Baldwin DF. Experimental evaluation of wetting dynamics models for Sn63Pb37 and SnAg4.0Cu0.5 solder materials Journal of Applied Physics. 104: 033537. DOI: 10.1063/1.2964118 |
0.583 |
|
2005 |
Kang SC, Kim C, Muncy J, Baldwin DF. Experimental wetting dynamics study of eutectic and lead-free solders with various fluxes, isothermal conditions, and bond pad metallizations Ieee Transactions On Advanced Packaging. 28: 465-474. DOI: 10.1109/Tadvp.2005.847836 |
0.615 |
|
2003 |
Ok SJ, Kim C, Baldwin DF. High density, high aspect ratio through-wafer electrical interconnect vias for MEMS packaging Ieee Transactions On Advanced Packaging. 26: 302-309. DOI: 10.1109/Tadvp.2003.818060 |
0.609 |
|
2002 |
Milner D, Paydenkar C, Baldwin D. Effects of substrate design on underfill voiding using the low cost, high throughput flip chip assembly process and no-flow underfill materials Ieee Transactions On Electronics Packaging Manufacturing. 25: 107-112. DOI: 10.1109/Tepm.2002.1021635 |
0.462 |
|
2002 |
Liu F, Lu J, Sundaram V, Sutter D, White G, Baldwin DF, Tummala RR. Reliability assessment of microvias in HDI printed circuit boards Ieee Transactions On Components and Packaging Technologies. 25: 254-259. DOI: 10.1109/Tcapt.2002.1010014 |
0.404 |
|
2001 |
Milner D, Baldwin DF. Application assessment of high throughput flip chip assembly for a high lead-eutectic solder cap interconnect system using no-flow underfill materials Ieee Transactions On Electronics Packaging Manufacturing. 24: 307-312. DOI: 10.1109/6104.980040 |
0.394 |
|
2001 |
Thorpe R, Baldwin D, Smith B, McGovern L. Yield analysis and process modeling of low cost, high throughput flip chip assembly based on no-flow underfill materials Ieee Transactions On Electronics Packaging Manufacturing. 24: 123-135. DOI: 10.1109/6104.930963 |
0.3 |
|
2000 |
Chen R, Baldwin DF. Displacement Theory for Fixturing Design of Thin Flexible Circuit Board Assembly Journal of Electronic Packaging. 123: 388-393. DOI: 10.1115/1.1371926 |
0.621 |
|
2000 |
Baldwin D, Houston P, Deladisma M, Crane L, Konarski M. Processing and reliability of fast-flow, snap-cure underfills - Part I: processing and moisture sensitivity Ieee Transactions On Electronics Packaging Manufacturing. 23: 235-235. DOI: 10.1109/Tepm.2000.895055 |
0.39 |
|
2000 |
Baldwin DF, Deshmukh RD, Hau CS. Gallium alloy interconnects for flip-chip assembly applications Ieee Transactions On Components and Packaging Technologies. 23: 360-366. DOI: 10.1109/6144.846775 |
0.353 |
|
2000 |
Palaniappan P, Baldwin DF. In process stress analysis of flip-chip assemblies during underfill cure Microelectronics Reliability. 40: 1181-1190. DOI: 10.1016/S0026-2714(00)00045-7 |
0.319 |
|
1999 |
Baldwin DF, Beerensson JT. Thermal Management in Direct Chip Attach Assemblies Journal of Electronic Packaging. 121: 222-230. DOI: 10.1115/1.2793844 |
0.391 |
|
1999 |
Rodriguez G, Baldwin DF. Analysis of Solder Paste Release in Fine Pitch Stencil Printing Processes Journal of Electronic Packaging. 121: 169-178. DOI: 10.1115/1.2792680 |
0.418 |
|
1998 |
BALDWIN DF, PASCARELLA NW. MANUFACTURING ANALYSIS OF UNDERFILL PROCESSING FOR LOW-COST FLIP CHIP ASSEMBLY Journal of Electronics Manufacturing. 8: 39-50. DOI: 10.1142/S0960313198000045 |
0.442 |
|
1998 |
Baldwin DF, Park CB, Suh NP. Microcellular sheet extrusion system process design models for shaping and cell growth control Polymer Engineering & Science. 38: 674-688. DOI: 10.1002/Pen.10232 |
0.378 |
|
1996 |
Mooney DJ, Baldwin DF, Suh NP, Vacanti JP, Langer R. Novel approach to fabricate porous sponges of poly(D,L-lactic-co-glycolic acid) without the use of organic solvents. Biomaterials. 17: 1417-22. PMID 8830969 DOI: 10.1016/0142-9612(96)87284-X |
0.311 |
|
1996 |
Park CB, Baldwin DF, Suh NP. Axiomatic design of a microcellular filament extrusion system Research in Engineering Design. 8: 166-177. DOI: 10.1007/Bf01608351 |
0.349 |
|
1996 |
Baldwin DF, Park CB, Suh NP. A microcellular processing study of poly(ethylene terephthalate) in the amorphous and semicrystalline states. Part II: Cell growth and process design Polymer Engineering & Science. 36: 1446-1453. DOI: 10.1002/Pen.10539 |
0.392 |
|
1996 |
Baldwin DF, Park CB, Suh NP. A microcellular processing study of poly(ethylene terephthalate) in the amorphous and semicrystalline states. Part I: Microcell nucleation Polymer Engineering & Science. 36: 1437-1445. DOI: 10.1002/Pen.10538 |
0.398 |
|
1996 |
Baldwin DF, Park CB, Suh NP. An extrusion system for the processing of microcellular polymer sheets: Shaping and cell growth control Polymer Engineering & Science. 36: 1425-1435. DOI: 10.1002/Pen.10537 |
0.339 |
|
1995 |
Baldwin DF, Shimbo M, Suh NP. The Role of Gas Dissolution and Induced Crystallization During Microcellular Polymer Processing: A Study of Poly (Ethylene Terephthalate) and Carbon Dioxide Systems Journal of Engineering Materials and Technology. 117: 62-74. DOI: 10.1115/1.2804373 |
0.32 |
|
1995 |
Park CB, Baldwin DF, Suh NP. Effect of the pressure drop rate on cell nucleation in continuous processing of microcellular polymers Polymer Engineering and Science. 35: 432-440. DOI: 10.1002/Pen.760350509 |
0.324 |
|
1994 |
SHIMBO M, BALDWIN DF, SUH NP. Cell Size Effect on the Mechanical and Viscoelastic Behavior of Microcellular Plastics Seikei-Kakou. 6: 863-868. DOI: 10.4325/Seikeikakou.6.863 |
0.312 |
|
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