Nagarajan Ranganathan

Affiliations:

University of South Florida, Tampa, FL, United States

Area:

Electronics and Electrical Engineering, Computer Science

Google:

"Nagarajan Ranganathan" OR "N Ranganathan"

Bio:

https://books.google.com/books?id=OI8vAQAAIAAJ

Tree Publications Similar researchers PubMed Report error

Parents

Mostafa A. Bassiouni	grad student	1988	University of Central Florida
Amar Mukherjee	grad student	1983-1988	University of Central Florida
(Hardware Algorithms for Data Compression)

Children

Kamesh V. Namuduri	grad student	1992	University of South Florida
Kenneth Hughes	grad student	1994	University of South Florida
Raghu Sastry	grad student	1994	University of South Florida
Minesh Patel	grad student	1997	University of South Florida
Rajarathnam Chandramouli	grad student	1998	University of South Florida (MathTree)
Girish Chiruvolu	grad student	1998	University of South Florida
Veeru Ramaswamy	grad student	1998	University of South Florida
Vijaykrishnan Narayanan	grad student	1993-1998	University of South Florida
Abdel Ejnioui	grad student	1999	University of South Florida (E-Tree)
Hitoshi Oi	grad student	1999	University of South Florida
Vamsi Krishna Srikantam	grad student	1999	University of South Florida
Raju D. Venkataramana	grad student	2000	University of South Florida
Sanjukta Bhanja	grad student	2002	University of South Florida
Ashok K. Murugavel	grad student	2003	University of South Florida
Saraju P. Mohanty	grad student	2000-2003	University of South Florida
Narender Hanchate	grad student	2006	University of South Florida
Upavan Gupta	grad student	2008	University of South Florida
Koustav Bhattacharya	grad student	2009	University of South Florida
Mahalingam Venkataraman	grad student	2009	University of South Florida
Soumyaroop Roy	grad student	2010	University of South Florida
Viswanath Sairaman	grad student	2010	University of South Florida
Ransford Hyman	grad student	2011	University of South Florida
Himanshu Thapliyal	grad student	2011	University of South Florida
Matthew A. Morrison	grad student	2014	University of South Florida
Yue Wang	grad student	2014	University of South Florida
Santosh Aditham	grad student	2016	University of South Florida
Saurabh Kotiyal	grad student	2016	University of South Florida

Collaborators

BETA: Related publications

Publications

You can help our author matching system! If you notice any publications incorrectly attributed to this author, please sign in and mark matches as correct or incorrect.
Aditham S, Ranganathan N. (2018) A System Architecture for the Detection of Insider Attacks in Big Data Systems Ieee Transactions On Dependable and Secure Computing. 15: 974-987
Morrison MA, Ranganathan N, Ligatti J. (2015) Design of Adiabatic Dynamic Differential Logic for DPA-Resistant Secure Integrated Circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 1381-1389
Kotiyal S, Thapliyal H, Ranganathan N. (2015) Reversible logic based multiplication computing unit using binary tree data structure Journal of Supercomputing
Casagrande T, Ranganathan N. (2015) GTFUZZ: A novel algorithm for robust dynamic power optimization via gate sizing with fuzzy games Proceedings -Design, Automation and Test in Europe, Date. 2015: 677-682
Morrison M, Ranganathan N. (2014) Forward body biased adiabatic logic for peak and average power reduction in 22nm CMOS Proceedings of the Ieee International Conference On Vlsi Design. 470-475
Morrison M, Ranganathan N. (2014) Synthesis of dual-rail adiabatic logic for low power security applications Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 33: 975-988
Kotiyal S, Thapliyal H, Ranganathan N. (2014) Efficient reversible NOR gates and their mapping in optical computing domain Microelectronics Journal. 45: 825-834
Thapliyal H, Ranganathan N. (2013) Design of efficient reversible logic-based binary and BCD adder circuits Acm Journal On Emerging Technologies in Computing Systems. 9
Hyman R, Ranganathan N, Bingel T, et al. (2013) A clock control strategy for peak power and RMS current reduction using path clustering Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 21: 259-269
Morrison M, Ranganathan N. (2013) A novel optimization method for reversible logic circuit minimization Proceedings of Ieee Computer Society Annual Symposium On Vlsi, Isvlsi. 182-187